CAT25C03_05 Datasheet, PDF (3/12 Pages) Catalyst Semiconductor – 1K/2K/4K/8K/16K SPI Serial CMOS EEPROM

CAT25C11/03/05/09/17
PIN CAPACITANCE ⁽¹⁾
Applicable over recommended operating range from TA=25˚C, f=1.0 MHz, VCC=+5.0V (unless otherwise noted).
Symbol
Test Conditions
Max.
Units Conditions
COUT Output Capacitance (SO)
8
pF
VOUT=0V
CIN
Input Capacitance (CS, SCK, SI, WP, HOLD)
6
pF
VIN=0V
A.C. CHARACTERISTICS
Limits
ts ^{SYMBOL PARAMETER}
1.8V-6.0V 2.5V-6.0V
4.5V-5.5V
Min. Max. Min. Max. Min. Max.
tSU
Data Setup Time
50
20
20
r _tH
Data Hold Time
50
20
20
a ^tWH
SCK High Time
250
75
40
tWL
SCK Low Time
250
75
40
P _fSCK
tLZ
d ^tRI(1)
tFI(1)
e _tHD
u ^tCD
tWC(3)
Clock Frequency
HOLD to Output Low Z
Input Rise Time
Input Fall Time
HOLD Setup Time
HOLD Hold Time
Write Cycle Time
DC
1 DC
5 DC 10
50
50
50
2
2
2
2
2
2
100
40
40
100
40
40
10
5
5
tin ^tV
Output Valid from Clock Low
250
75
40
tHO
Output Hold Time
0
0
0
tDIS
n _tHZ
tCS
o _tCSS
c _tCSH
tWPS
is t_CSH
Output Disable Time
HOLD to Output High Z
CS High Time
CS Setup Time
CS Hold Time
WP Setup Time
CS Hold Time
250
150
500
100
500
100
500
100
150
50
150
50
75
75
50
50
100
100
100
50
50
(1) This parameter is tested initially and after a design or process change that affects the parameter.
D^{(2) AC Test Conditions:}
Test
UNITS Conditions
ns VIH = 2.4V
ns CL = 100pF
ns VOL = 0.8V
ns VOH = 2.0v
MHz
ns
µs
C_L = 50pF
µs
(note 2)
ns
ns CL = 100pF
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
Input Pulse Voltages: 0.3V_CC to 0.7V_CC
Input rise and fall times: ≤10ns
Input and output reference voltages: 0.5V_CC
Output load: current source IOL max/IOH max; C_L = 50pF
(3) t_WC is the time from the rising edge of CS after a valid write sequence to the end of the internal write cycle.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
3
Doc. No. 1017, Rev. L