CAT5269_07 Datasheet, PDF (1/16 Pages) Catalyst Semiconductor – Dual Digitally Programmable Potentiometers (DPP™) with 256 Taps and 2-wire Interface

CAT5269
Dual Digitally Programmable Potentiometers
(DPP™) with 256 Taps and 2-wire Interface
FEATURES
„ Four linear taper digitally programmable
potentiometers
„ 256 resistor taps per potentiometer
„ End to end resistance 50kΩ or 100kΩ
„ Potentiometer control and memory access via
2-wire interface (I²C like)
„ Low wiper resistance, typically 100Ω
„ Nonvolatile memory storage for up to four
wiper settings for each potentiometer
„ Automatic recall of saved wiper settings at
power up
„ 2.5 to 6.0 volt operation
„ Standby current less than 1µA
„ 1,000,000 nonvolatile WRITE cycles
„ 100 year nonvolatile memory data retention
„ 24-lead SOIC and TSSOP packages
„ Industrial temperature range
For Ordering Information details, see page 15.
PIN CONFIGURATION
SOIC (W)
TSSOP (Y)
NC 1
A0 2
NC 3
NC 4
NC 5
NC 6
V_CC 7
R_LO 8
R_HO 9
R_WO 10
A2 11
¯W¯P¯ 12
24 A3
23 SCL
22 NC
21 NC
20 NC
19 NC
18 GND
17 R_W1
16 R_H1
15 R_L1
14 A1
13 SDA
DESCRIPTION
The CAT5259 is two digitally programmable poten–
tiometers (DPPs™) integrated with control logic and
18 bytes of NVRAM memory. Each DPP consists of a
series of resistive elements connected between two
externally accessible end points. The tap points
between each resistive element are connected to the
wiper outputs with CMOS switches. A separate 8-bit
control register (WCR) independently controls the
wiper tap switches for each DPP. Associated with
each wiper control register are four 8-bit non-volatile
memory data registers (DR) used for storing up to four
wiper settings. Writing to the wiper control register or
any of the non-volatile data registers is via a 2-wire
serial bus. On power-up, the contents of the first data
register (DR0) for each of the four potentiometers is
automatically loaded into its respective wiper control
registers.
The CAT5259 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications. It is available in the -40ºC to 85ºC
industrial operating temperature ranges and offered in
a 24-lead SOIC and TSSOP package.
FUNCTIONAL DIAGRAM
SCL
SDA
WP
A0
A1
A2
A3
2-WIRE BUS
INTERFACE
R_H0 R_H1
WIPER
CONTROL
REGISTERS
R_W0
CONTROL
LOGIC
NONVOLATILE
DATA
REGISTERS
R_L0 R_L1
R_W1
© Catalyst Semiconductor, Inc.
1
Characteristics subject to change without notice
Doc. No. MD-2123 Rev. C