CAT24FC32A Datasheet, PDF (4/12 Pages) Catalyst Semiconductor – 32K-Bit Fast Mode I2C Serial CMOS EEPROM

CAT24FC32A
A.C. CHARACTERISTICS
Over recommended operating conditions, unless otherwise specified (Note 1).
VCC=1.8V - 3.6V
Symbol Parameter
Min
f
Clock Frequency
SCL
t_SP
Input Filter Spike Suppression (SDA, SCL)
Typ
Max
400
50
t_LOW
Clock Low Period
1.3
t_HIGH
Clock High Period
0.6
t ⁽²⁾
R
SDA and SCL Rise Time
20
300
t ⁽²⁾
F
SDA and SCL Fall Time
20
300
t_HD:STA Start Condition Hold Time
0.6
t
SU:STA
Start Condition Setup Time (for a
Repeated Start)
0.6
t_HD:DAT Data Input Hold Time
0
t_SU:DAT Data In Setup Time
100
t_SU:STO Stop Condition Setup Time
0.6
t_SU:WP WP Setup Time
0
t_HD:WP WP Hold Time
2.5
t_AA
SCL Low to Data Out Valid
900
t_DH
Data Out Hold Time
50
t ⁽²⁾
BUF
Time the Bus must be Free Before a New
Transmission Can Start
1.3
t ⁽²⁾
OF
Output Fall Time from V_IH min to V_IL max
20
250
t ⁽³⁾
WC
Write Cycle Time (Byte or Page)
5
Units
kHz
ns
µs
µs
ns
ns
µs
µs
ns
ns
µs
µs
µs
ns
ns
µs
ns
ms
Power-Up Timing ⁽²⁾⁽⁴⁾
Symbol Parameter
Min
Typ
Max
Units
t_PUR
Power-Up to Read Operation
1
ms
t_PUW Power-Up to Write Operation
1
ms
Note:
(1) Test Conditions according to "AC Test Conditions" Table.
(2) This parameter is characterized initially and after a design or process change that affects the parameter. Not 100% tested.
(3) The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the
write cycle, the bus interface circuits are disabled, SDA is allowed to remain high and the device does not respond to its slave address.
(4) t_PUR and t_PUW are the delays required from the time V_CC is stable until the specified operation can be initiated.
Doc. No. 1048, Rev. F
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