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CAT24FC65 Datasheet, PDF (2/10 Pages) Catalyst Semiconductor – 64K-Bit I2C Serial CMOS EEPROM with Partial Array Write Protection
CAT24FC65/66
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ................. –55°C to +125°C
Storage Temperature ....................... –65°C to +150°C
Voltage on Any Pin with
Respect to Ground(1) ........... –2.0V to +VCC + 2.0V
VCC with Respect to Ground ............... –2.0V to +7.0V
RELIABILITY CHARACTERISTICS (3)
Symbol
Parameter
NEND
Endurance
TDR
Data Retention
VZAP
ILTH(4)
ESD Susceptibility
Latch-up
Package Power Dissipation
Capability (Ta = 25°C) ................................... 1.0W
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current(2) ........................ 100mA
*COMMENT
Stresses above those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions
outside of those listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for extended periods
may affect device performance and reliability.
Min
Typ
1,000,000
100
4000
100
Max
Units
Cycles/Byte
Years
Volts
mA
D.C. OPERATING CHARACTERISTICS
VCC = +2.5V to +5.5V, unless otherwise specified.
Symbol Parameter
Test Conditions Min
Typ
Max Units
ICC1 Power Supply Current - Read
fSCL = 400 KHz
VCC=5V
400
µA
ICC2 Power Supply Current - Write
ISB(5) Standby Current
ILI Input Leakage Current
ILO Output Leakage Current
fSCL = 400KHz
VCC=5V
VIN = GND or VCC
VCC=5V
VIN = GND to VCC
VOUT = GND to VCC
3
mA
1
µA
1
µA
1
µA
VIL Input Low Voltage
-0.5
VCC x 0.3 V
VIH Input High Voltage
VCC x 0.7
VCC + 0.5 V
VOL1 Output Low Voltage (VCC = +3.0V)
IOL = 3.0 mA
0.4
V
CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V
Symbol Test
Conditions Min
Typ
CI/O(3) Input/Output Capacitance (SDA)
VI/O = 0V
CIN(3)
Input Capacitance (SCL, WP, A0, A1)
VIN = 0V
ZWPL
WP Input Impedance
VIN ≤ 0.5V
5
ZWPH
WP Input Impedance
VIN>0.7VxVCC 500
Max
Units
8
pF
6
pF
70
kΩ
kΩ
Note:
(1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns.
(2) Output shorted for no more than one second. No more than one output shorted at a time.
(3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100
and JEDEC test methods.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V.
(5) Standby current (ISB ) = 10 µA max at extended temperature range.
Doc. No. 1047, Rev. H
2
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice