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| DAC8871 Datasheet, PDF (5/19 Pages) Burr-Brown (TI) – 16-Bit, Single-Channel, ±18V Output (Unbuffered), Ultra-Low Power, Serial Interface DIGITAL-TO-ANALOG CONVERTER | |||
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DAC8871
www.ti.com
PIN CONFIGURATION (NOT TO SCALE)
PW PACKAGE
TSSOP-16
(TOP VIEW)
VOUT 1
VCC 2
VSS 3
AGND 4
VREFH-F 5
VREFH-S 6
VREFL-S 7
VREFL-F 8
DAC8871
16 DGND
15 LDAC
14 SDI
13 SCLK
12 CS
11 RST
10 RSTSEL
9 VDD
SBAS396 â JUNE 2007
TERMINAL FUNCTIONS
TERMINAL
NO.
NAME
1
VOUT
2
VCC
3
VSS
4
AGND
5
VREFH-F
6
VREFH-S
7
VREFL-S
8
VREFL-F
9
VDD
10
RSTSEL
11
RST
12
CS
13
SCLK
14
SDI
15
LDAC
16
DGND
DESCRIPTION
Analog output of the DAC
Positive analog power supply: +15V
Negative analog power supply: â15V
Analog ground
VREFH reference input (Force). Connect to external VREFH.
VREFH reference input (Sense). Connect to external VREFH.
VREFL reference input (Sense). Connect to external VREFL.
VREFL reference input (Force). Connect to external VREFL.
Digital power. +5V for 5V interface logic; +3V for 3V logic.
Power-On-Reset select. Determines VOUT after power-on reset. If tied to VDD, the DAC latch is set to mid-scale
after power-on, and VOUT is (VREFHâ VREFL)/2. If tied to DGND, the DAC latch is cleared ('0'), and VOUT is VREFL.
Reset (active low)
Chip select input (active low). Data are not clocked into SDI unless CS is low.
Serial clock input
Serial data input. Data are latched into input register on the rising edge of SCLK.
Load DAC control input (active low). When LDAC is low, the DAC latch is simultaneously updated with the content
of the input register.
Digital ground
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