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DRV101 Datasheet, PDF (4/19 Pages) Burr-Brown (TI) – PWM SOLENOID/VALVE DRIVER
PIN DESCRIPTIONS
PIN #
NAME
DESCRIPTION
Pin 1
Pin 2
Input
Delay Adjust
The input is compatible with standard TTL levels. The device output becomes enabled when the input voltage is driven above
the typical switching threshold, 1.7V. Below this level, the output is disabled. With no connection to the pin, the input level rises
to 3.4V. Input current is 20µA when driven high and 80µA with the input low. The input may be momentarily driven to the power
supply (VS) without damage.
This pin sets the duration of the initial 100% duty cycle before the output goes into PWM mode. Leaving this pin floating results
in a delay of approximately 15µs, which is internally limited by parasitic capacitance. Minimum delay may be reduced to less
than 3µs by tying the pin to 5V. This pin connects internally to a 3µA current source from VS and to a 3V threshold comparator.
When the pin voltage is below 3V, the output device is 100% on. The PWM oscillator is not synchronized to the Input (pin 1),
so the first pulse may be extended by any portion of the programmed duty cycle.
Pin 3
Duty Cycle Adjust
(PWM)
Internally, this pin connects to the input of a comparator and a 19kΩ resistor to ground. It is driven by a 200µA current source
from VS. The voltage at this node linearly sets the duty cycle. Duty cycle can be programmed with a resistor, analog voltage,
or output of a D/A converter. The active voltage range is from 0.75V to 3.7V to facilitate the use of single-supply control
electronics. At 0.75V (or RPWM = 3.5kΩ), duty cycle is near 90%. Swing to ground should be limited to no lower than 0.1V. PWM
frequency is a constant 24kHz.
Pin 4
Ground
This pin is electrically connected to the package tab. It must be connected to system ground for the DRV101 to function. It
carries the 3.5mA quiescent current plus the load current when the device is on.
Pin 5
Pin 6
VS
This is the power supply pin. Operating range is +9V to +60V.
Out
The output is the collector of a power npn with the emitter connected to ground. Low power dissipation in the DRV101 is attained
by the low saturation voltage and the fast switching transitions. Fall time is less than 75ns, rise time depends on load
impedance. Base drive to the power device is limited with light loads to control turn-off delay. The response of this circuit causes
the brief dip in saturation voltage after turn on. A flyback diode is needed with inductive loads to conduct the load current during
the off cycle. The external diode should be selected for low forward voltage. The internal clamp diode provides protection but
shouuld not be used to conduct load currents greater than 0.5A.
Pin 7
Flag
Normally high (active low), the Flag signals either an over-temperature, over-current, or under-current fault. The over/under-
current flags are true only when the output is on (constant dc output or the “on” portion of PWM mode). A thermal fault (thermal
shutdown) occurs when the die surface reaches approximately 165°C and latches until the die cools to 150°C. Its output
requires a pull-up resistor. It can typically sink two milliamps, sufficient to drive a low-current LED.
LOGIC BLOCK DIAGRAM
Over/Under Current
Thermal
Shutdown
1
Input
On
Off
PWM
Delay
2
CD
3
RPWM
Flag
7
VS (+9V to +60V)
5
Load
6
Out Schottky Power
Rectifier
4
Gnd
®
DRV101
4