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DRV101 Datasheet, PDF (2/19 Pages) Burr-Brown (TI) – PWM SOLENOID/VALVE DRIVER
SPECIFICATIONS
At TC = +25°C, VS = +24V, Load = 100Ω || 1000pF, and 4.99kΩ Flag pullup to +5V, unless otherwise noted.
DRV101T, F
PARAMETER
COMMENTS
MIN
TYP
MAX
UNITS
OUTPUT
Output Saturation Voltage, Sink
Current Limit
Under-Scale Current(1)
Leakage Current
DIGITAL CONTROL INPUT(2)
VCTR Low (output disabled)
VCTR High (output enabled)
ICTR Low (output disabled)
ICTR High (output enabled)
Propagation Delay
DELAY TO PWM(3)
Delay Equation(4)
Delay Time
Minimum Delay Time(5)
DUTY CYCLE ADJUST
Duty Cycle Range
Duty Cycle Accuracy
vs Supply Voltage
Nonlinearity(6)
DYNAMIC RESPONSE
Output Voltage Rise Time
Output Voltage Fall Time
Oscillator Frequency
FLAG
Normal Operation
Fault(7)
Sink Current
Under-Current Flag: Set
Reset
Over-Current Flag: Set
Reset
THERMAL SHUTDOWN
Junction Temperature
Shutdown
Reset from Shutdown
POWER SUPPLY
Specified Operating Voltage
Operating Voltage Range
Quiescent Current
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance, θJC
7-Lead DDPAK, 7-Lead TO-220
Thermal Resistance, θJA
7-Lead DDPAK, 7-Lead TO-220
IO = 1A
IO = 0.1A
Output Transistor Off, VS = VO = +60V
VCTR = 0V
VCTR = +5V
On-to-Off and Off-to-On
dc to PWM Mode
CD = 0.1µF
CD = 0
50% Duty Cycle, RPWM = 28.7kΩ
50% Duty Cycle, VS = VO = +9V to +60V
10% to 80% Duty Cycle
VO = 10% to 90% of VS
VO = 90% to 10% of VS
20kΩ Pull-Up to +5V, IO < 1.5A
Sinking 1mA
VFLAG = 0.4V
IO = 0
No Heat Sink
+0.8
+1
+0.2
+0.3
1.9
2.3
3
23
±0.01
±1
0
+2.2
+1.2
+5.5
–80
20
2
Delay to PWM ≈ CD • 106 (CD in F)
80
95
110
15
10 to 90
±2
±5
±1
±5
2
1
2.5
0.1
2.5
19
24
29
+4
+4.9
+0.2
+0.8
2
4
2
2
2
V
V
A
mA
mA
V
V
µA
µA
µs
s
ms
µs
%
%
%
% FSR
µs
µs
kHz
V
V
mA
µs
µs
µs
µs
+165
°C
+150
°C
+24
V
+9
+60
V
3.5
5
mA
–40
+85
°C
–55
+125
°C
–65
+150
°C
3
°C/W
65
°C/W
NOTES:(1) Under-scale current for TC < 100°C—see Under-Scale Current vs Temperature typical performance curve. (2) Logic High enables output (normal
operation). (3) Constant dc output to PWM (pulse-width modulated) time. (4) Maximum delay is determined by an external capacitor. Pulling the Delay Adjust Pin
low corresponds to an infinite (continuous) delay. (5) Connecting the Delay Adjust pin to +5V reduces delay time to 3µs. (6) VIN at pin 3 to percent of duty cycle
at pin 6. (7) A fault results from over-temperature, over-current, or under-current conditions.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
DRV101
2