CS4272 Datasheet, PDF (28/53 Pages) Cirrus Logic – 24-Bit, 192 kHz Stereo Audio CODEC

CS4272
Table 7. Crystal Frequencies
Mode
Single Speed
Double Speed
Quad Speed
Crystal Frequency
512 x Fs
256 x Fs
128 x Fs
To operate the CS4272 with an externally generated MCLK signal, no crystal should be used, XTI should be con-
nected to ground and XTO should be left unconnected. In this configuration, MCLK is an input and must be driven
externally with an appropriate speed clock.
5.2.3.2 Clock Ratio Selection
Depending on the use of an external crystal, or whether the CS4272 is in Master or Slave Mode, different
MCKL/LRCK and SCLK/LRCK ratios may be used. These ratios as well as the Control Port Register Bits that must
be set in order to obtain them are shown in Tables 8 and 9 below.
Table 8. Clock Ratios - Control Port Mode With External Crystal
External Crystal Used, MCLK=Output
Single Speed
Double Speed
Quad Speed
MCLK/LRCK
256
512
128
256
128
Master Mode
SCLK/LRCK
64
64
64
64
64
LRCK
Fs
Fs
Fs
Fs
Fs
Ratio1 Bit
0
1
0
1
d²⁷
Ratio0 Bit
d²⁷
d²⁷
d²⁷
d²⁷
d²⁷
Single Speed
Double Speed
Quad Speed
MCLK/LRCK
256
512
128
256
128
Slave Mode
SCLK/LRCK
32, 64, 128
32, 64, 128
32, 64
32, 64
32, 64
LRCK
Fs
Fs
Fs
Fs
Fs
Ratio1 Bit
0
1
0
1
d²⁷
Notes: 27. For the Ratio1 and Ratio0 bits listed above, “d” indicates that any value may written.
Ratio0 Bit
d²⁷
d²⁷
d²⁷
d²⁷
d²⁷
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