CS4272 Datasheet, PDF (23/53 Pages) Cirrus Logic – 24-Bit, 192 kHz Stereo Audio CODEC

4. TYPICAL CONNECTION DIAGRAM
CS4272
* Only one must be used. See
"Grounding and Power Supply
Decoupling."
* ^{5.1 Ω}
∗ _{Not to exceed 1 µF.}
VA
FILT+
47 µF
0.1 µF
AGND
1 µF ^∗
0.1 µF
VCOM
0.1 µF
0.1 µF
+5 V
1 µF
1 µF
+5 V to 3.3 V ^*
VD
¤ See "Master/Slave Mode Selection".
VL
+5 V to 2.5 V
0.1 µF
1 µF
¤ 47 kΩ
Power Down
and Mode
Settings
(Control Port)
Analog Input
Buffer
AD0 / CS (I2S/LJ)
SDA / CDIN (M1)
SDOUT (M/S)
SDIN
SCL / CCLK (M0)
RST
CS4272
AINA+
AINA-
MCLK
SCLK
LRCK
AINB+
AINB-
AOUTA-
AMUTEC
AOUTA+
40 pF
**
40 pF
** Optional. See "Crystal
Applications (XTI/XTO)".
XTI
XTO
DGND
AOUTB-
BMUTEC
AOUTB+
Audio Data
Processor
Timing Logic
&
Clock
Analog Conditioning
&
Mute
Figure 8. CS4272 Typical Connection Diagram
DS593F1
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