CS42436 Datasheet, PDF(27/66 Page) Cirrus Logic – 108 dB, 192 kHz 6-in, 6-out TDM CODEC

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CS42436 Datasheet, PDF (27/66 Pages) Cirrus Logic – 108 dB, 192 kHz 6-in, 6-out TDM CODEC

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5 APPLICATIONS

5.1 Overview

The CS42436 is a highly integrated mixed signal 24-bit audio CODEC comprised of 6 analog-to-digital

converters (ADC), implemented using multi-bit delta-sigma techniques, and 6 digital-to-analog converters

(DAC) also implemented using multi-bit delta-sigma techniques.

Other functions integrated within the CODEC include independent digital volume controls for each DAC,

digital de-emphasis filters for the DAC, digital volume control with gain on each ADC channel, ADC high-

pass filters, and an on-chip voltage reference.

The serial audio interface ports allow up to 6 DAC channels and 8 ADC channels in a Time-Division Mul-

tiplexed (TDM) interface format. The CS42436 features an Auxiliary Port used to accommodate an addi-

tional two channels of PCM data on the ADC_SDOUT data line in the TDM digital interface format. See

âAUX Port Digital Interface Formatsâ on page 36 for details.

The CS42436 operates in one of three oversampling modes based on the input sample rate. Mode selec-

tion is determined automatically based on the MCLK frequency setting. Single-Speed mode (SSM) sup-

ports input sample rates up to 50 kHz and uses a 128x oversampling ratio. Double-Speed mode (DSM)

supports input sample rates up to 100 kHz and uses an oversampling ratio of 64x. Quad-Speed mode

(QSM) supports input sample rates up to 200 kHz and uses an oversampling ratio of 32x (NOTE: QSM

for the ADC is only supported in the IÂ²S, Left-Justified, Right-Justified interface formats. QSM is not sup-

ported for the ADC). NOTE: QSM is only available in software mode (see section 5.4 on page 34 for de-

tails).

All functions can be configured through software via a serial control port operable in SPI mode or in IÂ²C

mode. A hardware, stand-alone mode is also available, allowing configuration of the CODEC on a more

limited basis. See Table 2 for the default configuration in Hardware Mode.

Figure 1 on page 11 and Figure 2 on page 12 show the recommended connections for the CS42436 in

software and hardware mode, respectively. See section âRegister Descriptionâ on page 43 for the default

Hardware Mode Feature Summary

Function

Default Configuration

Hardware Control

Power Down ADC

All ADCâs are enabled

Power Down DAC

All DACâs are enabled

Power Down Device

Device is powered up

MCLK Frequency Select

Selectable between 256Fs

and 512Fs

âMFREQâ pin 3

Freeze Control

N/A

AUX Serial Port Interface Format

Left-Justified

ADC1/ADC2 High Pass Filter Freeze High Pass Filter is always

enabled

ADC3 High Pass Filter Freeze

High Pass Filter can be

enabled/disabled

âADC3_HPFâ pin 4

DAC De-Emphasis

No De-Emphasis applied

ADC1/ADC2 Single-Ended Mode

Disabled

ADC3 Single-Ended Mode

Selectable between Differ-

âADC_SDOUT/

ential and Single-Ended ADC3_SINGLEâ pin 13

Table 2. Hardware Configurable Settings

Note

see section

5.4

see section

5.2.3

see section

5.2.2

DS647PP2

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