CS42426 Datasheet, PDF (25/67 Pages) Cirrus Logic – 114 dB, 192kHz 6-Ch CODEC WITH PLL

CS42426
3.5.4.4 OLM Config #4
This One-Line Mode configuration can support up to 6 channels of DAC data on 2 DAC_SDIN pins, and
2 channels of ADC data and will handle up to 24-bit samples at a sampling frequency of 48 kHz on all
channels for both the DAC and ADC. The output data stream of the internal ADCs can be configured to
run at the DAC_SP clock speeds or to run at the ADC_SP rate. The DAC_SP and ADC_SP can operate at
different Fs rates.
Register / Bit Settings
Functional Mode Register (addr = 03h)
Set DAC_FMx = 00,01,10
Set ADC_FMx = 00,01,10
Set ADC_CLK_SEL = 0 or 1
Interface Format Register (addr = 04h)
Set DIFx bits to proper serial format
Set ADC_OLx bits = 00
Set DAC_OLx bits = 00,01,10
Misc. Control Register (addr = 05h)
Set DAC_SP M/S = 0 or 1
Set ADC_SP M/S = 0 or 1
Set EXT ADC SCLK = 0
Description
DAC_LRCK can run at SSM, DSM, or QSM independent of ADC_LRCK
ADC_LRCK can run at SSM, DSM, or QSM independent of DAC_LRCK
Configure ADC_SDOUT to be clocked from the ADC_SP or DAC_SP
clocks.
Select the digital interface format when not in one line mode
Set ADC operating mode to Not One Line Mode since only 2 channels of
ADC are supported
Select DAC operating mode, see table below for valid combinations
Set DAC Serial Port to master mode or slave mode.
Set ADC Serial Port to master mode or slave mode.
External ADCs are not used. Leave bit in default state.
ADC Mode
Not One Line Mode
Not One
Line Mode
DAC_SCLK=64Fs/128Fs
DAC_LRCK=SSM/DSM/QSM
ADC_SCLK=64Fs/128Fs
ADC_LRCK=SSM/DSM/QSM
One Line
Mode #1
not valid
One Line
Mode #2
not valid
DAC Mode
One Line Mode #1
DAC_SCLK=128Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=64Fs/128Fs
ADC_LRCK=SSM/DSM/QSM
not valid
not valid
One Line Mode #2
DAC_SCLK=256Fs
DAC_LRCK=SSM
ADC_SCLK=64Fs/128Fs
ADC_LRCK=SSM/DSM/QSM
not valid
not valid
RMCK
ADCIN1
ADCIN2
ADC_SCLK
ADC_LRCK
ADC_SDOUT
64Fs ,12 8Fs
MCLK
SCLK_PORT1
LRCK_PORT1
SDIN_PORT1
DA C _S CL K
DAC_LRCK
DAC_SDIN1
DAC_SDIN2
DAC_SDIN3
64Fs,128Fs, 256Fs
SDIN_PORT2
SCLK_PORT2
L R CK _P O R T 2
S DO UT1_POR T2
S DO UT2_POR T2
S DO UT3_POR T2
CS42426
DIGITAL AUDIO
PROCESSOR
Figure 16. OLM Configuration #4
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