DDC114 Datasheet, PDF (22/30 Pages) Burr-Brown (TI) – Quad Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER

DDC114
SBAS255A − JUNE 2004 − REVISED NOVEMBER 2004
SPECIAL CONSIDERATIONS
Cascading Multiple Converters
Multiple DDC114 units can be connected in serial
configuration, as illustrated in Figure 20.
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DOUT can be used with DIN to daisy-chain several
DDC114 devices together to minimize wiring. In this mode
of operation, the serial data output is shifted through
multiple DDC114s, as illustrated in Figure 20.
See Figure 22 for the timing diagram when the DIN
function is used to daisy-chain several devices. Table 11
gives the timing specification for data retrieval using DIN.
Data Clock
Data Retrievel
Outputs
DOUT _DDC114 DIN
DOUT
DIN
DOUT _DDC114 DIN
DOUT
D IN
DOUT _DDC114 DIN
DOUT
DIN
Sensor A B C D
E FGH
I JKL
Figure 20. Daisy-Chained DDC114s
CLK
DVALID
DCLK
DOUT
t₁₈
t₂₀
t₁₉
Input 4
MSB
t₂₁
Input 4 Input 3
LSB MSB
Input 3 Input 2
LSB MSB
Input 2 Input 1
LSB MSB
t₂₀
Input 1
LSB
Input 4
MSB
Figure 21. Digital Interface Timing Diagram for Data Retrieval From a Single DDC114
Table 10. Timing for the DDC114 Data Retrieval
SYMBOL DESCRIPTION
CLK = 4MHz, CLK_4X = 0
MIN
TYP
MAX
CLK = 4.8MHz, CLK_4X = 0
MIN
TYP
MAX
t18
Propagation Delay from Falling Edge of CLK to DVALID LOW
5
t19
Propagation Delay from Falling Edge of DCLK to DVALID HIGH
5
t20
Hold Time that DOUT is Valid Before the Falling Edge of DVALID
t21
Hold Time that DOUT is Valid After Falling Edge of DCLK
5
t21A(1) Propagation Delay from Falling Edge of DCLK to Valid DOUT
(1) _{With a maximum load of one DDC114 (4pF typical) with an additional load of (5pF).}
1.75
10
5
5
1.458
5
10
UNITS
ns
ns
µs
ns
ns
22