OPA2690 Datasheet, PDF (21/30 Pages) Burr-Brown (TI) – Dual, Wideband, Voltage-Feedback OPERATIONAL AMPLIFIER with Disable

OPA2690
www.ti.com
DRIVING CAPACITIVE LOADS
One of the most demanding and yet very common load
conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an ADC—including
additional external capacitance which may be
recommended to improve ADC linearity. A high-speed,
high open-loop gain amplifier like the OPA2690 can be
very susceptible to decreased stability and closed-loop
response peaking when a capacitive load is placed directly
on the output pin. When the open-loop output resistance
of the amplifier is considered, this capacitive load
introduces an additional pole in the signal path that can
decrease the phase margin. Several external solutions to
this problem have been suggested. When the primary
considerations are frequency response flatness, pulse
response fidelity, and/or distortion, the simplest and most
effective solution is to isolate the capacitive load from the
feedback loop by inserting a series-isolation resistor
between the amplifier output and the capacitive load. This
does not eliminate the pole from the loop response, but
rather shifts it and adds a zero at a higher frequency. The
additional zero acts to cancel the phase lag from the
capacitive load pole, thus increasing the phase margin and
improving stability.
The Typical Characteristics show the recommended R_S
versus capacitive load and the resulting frequency
response at the load. Parasitic capacitive loads greater
than 2pF can begin to degrade the performance of the
OPA2690. Long PC board traces, unmatched cables, and
connections to multiple devices can easily exceed this
value. Always consider this effect carefully, and add the
recommended series resistor as close as possible to the
OPA2690 output pin (see the Board Layout Guidelines
section).
The criterion for setting this R_S resistor is a maximum
bandwidth, flat frequency response at the load. For the
OPA2690 operating in a gain of +2, the frequency
response at the output pin is already slightly peaked
without the capacitive load requiring relatively high values
of R_S to flatten the response at the load. Increasing the
noise gain will reduce the peaking as described previously.
The circuit of Figure 13 demonstrates this technique,
allowing lower values of R_S to be used for a given
capacitive load.
SBOS238D − JUNE 2002 − REVISED DECEMBER 2004
50Ω
175Ω
50Ω
R_NG
402Ω
+5V
Power−supply decoupling
not shown.
R
1/2
O P A2 6 90
V_O
402Ω
C_LOAD
− 5V
Figure 13. Capacitive Load Driving with Noise
Gain Tuning
This gain of +2 circuit includes a noise gain tuning resistor
across the two inputs to increase the noise gain,
increasing the unloaded phase margin for the op amp.
Although this technique will reduce the required R_S
resistor for a given capacitive load, it does increase the
noise at the output. It also will decrease the loop gain,
slightly decreasing the distortion performance. If, however,
the dominant distortion mechanism arises from a high R_S
value, significant dynamic range improvement can be
achieved using this technique. Figure 14 shows the
required R_S versus C_LOAD parametric on noise gain using
this technique. This is the circuit of Figure 13 with R_NG
adjusted to increase the noise gain (increasing the phase
margin) then sweeping C_LOAD and finding the required R_S
to get a flat frequency response. This plot also gives the
required R_S versus C_LOAD for the OPA2690 operated at
higher signal gains without R_NG.
100
90
80
70
60
50
40
30
20
10
0
1
NG = 2
NG = 3
NG = 4
10
100
Capacitive Load (pF)
1000
Figure 14. Required R_S vs Noise Gain
21