CS42448 Datasheet, PDF (2/70 Pages) Cirrus Logic – 108 dB, 192 kHz 6-in, 8-out CODEC

TABLE OF CONTENTS
1 PIN DESCRIPTION .................................................................................................................... 6
1.1 Digital I/O Pin Characteristics ............................................................................................ 8
2 TYPICAL CONNECTION DIAGRAM ......................................................................................... 9
3 CHARACTERISTICS AND SPECIFICATIONS ....................................................................... 10
SPECIFIED OPERATING CONDITIONS ............................................................................... 10
ABSOLUTE MAXIMUM RATINGS ......................................................................................... 10
ANALOG INPUT CHARACTERISTICS (CS42448-CQZ) ....................................................... 11
ANALOG INPUT CHARACTERISTICS (CS42448-DQZ) ....................................................... 12
ADC DIGITAL FILTER CHARACTERISTICS ......................................................................... 13
ANALOG OUTPUT CHARACTERISTICS (CS42448-CQZ) ................................................... 14
ANALOG OUTPUT CHARACTERISTICS (CS42448-DQZ) ................................................... 16
COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ................ 18
SWITCHING SPECIFICATIONS - ADC/DAC PORT .............................................................. 19
SWITCHING CHARACTERISTICS - AUX PORT................................................................... 21
SWITCHING SPECIFICATIONS - CONTROL PORT - I²C MODE......................................... 22
SWITCHING SPECIFICATIONS - CONTROL PORT - SPI FORMAT ................................... 23
DC ELECTRICAL CHARACTERISTICS................................................................................. 24
DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS ....................................... 24
4 APPLICATIONS ....................................................................................................................... 25
4.1 Overview .......................................................................................................................... 25
4.2 Analog Inputs ................................................................................................................... 25
4.2.1 Line Level Inputs ................................................................................................. 25
4.2.2 ADC3 Analog Input ............................................................................................. 26
4.2.3 High Pass Filter and DC Offset Calibration ......................................................... 27
4.3 Analog Outputs ................................................................................................................ 27
4.3.1 Initialization ......................................................................................................... 27
4.3.2 Output Transient Control ..................................................................................... 27
4.3.3 Popguard® .......................................................................................................... 29
4.3.4 Mute Control ........................................................................................................ 29
4.3.5 Line-level Outputs and Filtering .......................................................................... 29
4.3.6 Digital Volume Control ........................................................................................ 30
4.3.7 De-Emphasis Filter .............................................................................................. 30
4.4 System Clocking .............................................................................................................. 31
4.5 CODEC Digital Interface Formats .................................................................................... 31
4.5.1 I²S ........................................................................................................................ 33
4.5.2 Left-Justified ........................................................................................................ 33
4.5.3 Right Justified ..................................................................................................... 33
4.5.4 OLM #1 ............................................................................................................... 33
4.5.5 OLM #2 ............................................................................................................... 34
4.5.6 TDM .................................................................................................................... 34
4.5.7 I/O Channel Allocation ........................................................................................ 35
4.6 AUX Port Digital Interface Formats .................................................................................. 36
4.6.1 I²S ........................................................................................................................ 36
4.6.2 Left Justified ........................................................................................................ 36
4.7 Control Port Description and Timing ................................................................................ 37
4.7.1 SPI Mode ............................................................................................................ 37
4.7.2 I²C Mode ............................................................................................................. 38
4.8 Interrupts .......................................................................................................................... 39
4.9 Recommended Power-up Sequence ............................................................................... 39
4.10 Reset and Power-up ..................................................................................................... 39
4.11 Power Supply, Grounding, and PCB layout ................................................................... 40
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DS648PP2