AZP94_09 Datasheet, PDF (2/10 Pages) Arizona Microtek, Inc – ECL/PECL ÷1, ÷2 Clock Generation Chip with Tristate Compatible Outputs

AZP94
MLP 8, 2x2 mm Package (AZP94NA)
The AZP94NA provides a V_BB with an 1880Ω internal bias resistor from D to V_BB. This feature allows AC
coupling with minimal external components. The V_BB pin supports 1.5mA sink/source current and should be
bypassed to ground or V_CC with a 0.01 μF capacitor.
TYPICAL TRISTATE COMPATIBLE OPERATION
Tristate Compatible Operation
The outputs of the AZP94 are emitter followers as shown in the left side of the drawing. When a part is
disabled, both outputs are set in the LOW state. This allows a HIGH output from an enabled part to override a
disabled output and pull the combined line HIGH as seen in the right hand side of the drawing. When the enabled
part output is LOW, the combined line remains LOW.
If all connected AZP94 parts are disabled, both output lines will be in the LOW state.
NOTE: The specifications in the ECL/PECL tables are valid when thermal equilibrium has been established.
June 2009 Rev - 6
www.azmicrotek.com
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