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AZPB70 Datasheet, PDF (11/15 Pages) Arizona Microtek, Inc – Programmer Board Kit for AZT70/71
Arizona Microtek, Inc.
AZPB70
Programmer Board for AZT70/71
PROGRAMMING FROM THE SHIFT REGISTER
To initially determine the capacitance value for the desired center frequency of the oscillator one should set the
capacitance of the AZT70/71 directly from the active shift register bits. To accomplish this, the CLK pin is left high after
the last control word bit has been shifted in. Figure 13 shows the control word 11001100100 has been serially entered into
the register. Note that bit0 is the 1st bit to enter and bit10 is the last. In the AZT70, bit0, bit9 & bit10 do not affect the
capacitance value but still must be included in the serial bit stream. For the shift register, capacitors are selected when bits
are active HIGH.
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
bit 8
bit 9 bit 10
DA
bit 0
loaded 1st
Register data
active when
CLK is high
CLK
t
Figure 13 - Shift register programming
WRITING DATA TO THE EEPROM
Once the desired capacitance value has been determined, the digital control word can be written or re-written into the
EEPROM. By storing the control word in the EEPROM, the customer is prevented from making adjustments from the
factory set programming data. This is accomplished within the AZT70/71 with internal pull-downs on the DA, PV, and
CLK pins. The detailed sequence for writing data to the EEPROM within the AZT70/71 is described in Table 5. Note that
with EEPROM, capacitors are selected when bits are active LOW.
Table 5 – Data writing sequence for EEPROM
Step
Action
1
Determine the desired capacitor control word with the operational power supply voltage and
desired oscillator conditions
2
Set the VDD supply voltage to +5.0V
3
If EEPROM is not already erased, erase EEPROM (see ERASING THE EEPROM)
4
Read the current state of the EEPROM bits (see READING BACK FROM THE EEPROM)
5
Compare the desired control word to the stored EEPROM control word. Count the number of
differences so as to prevent double/redundant writing
6
One bit at a time, load the first desired control word bit (bit selection for EEPROM is active LOW)
7
Set the PV pin to +6V (≥5.6V, ≤6.1V) with the pulse and idle shown in timing diagram (Figure 15)
8
Progress through all necessary control word bits by repeating steps 5 & 6 until all bits are set to the
desired control word.
9
Verify the correct EEPROM contents by reading back the individual bits
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May 2012, Rev 1.2