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C0240QGLA-T Datasheet, PDF (17/23 Pages) AZ Displays – Approval Product Specification | |||
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Document No.:
8. Pin Assignment:
PIN Symbol
AR_VDD
AR_VSS
VCI
VCI1
GND
C12M
C12P
C11M
C11P
VLOUT1
C31P
C31M
C32P
C32M
VLOUT3
VLOUT2
C21P
C21M
VGS
IOVCC
SPB
ID_MIB
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
I/O
Description
Remarks
I Positive voltage for OLED
I Nagative voltage for OLED
I Power supply for analog circuit(2.5v~3.3v)
O
A reference voltage for 1st booster r(connect a 1u/10v capacitance to
gnd)
I Ground
I
External capacitance connect pin between C12M and C12P (1u/10V)
I
I
External capacitance connect pin between C11M and C11P (1u/10V)
I
O 1st booster output pin. (1u/10V)
I
External capacitance connect pin between C31M and C31P (1u/10V)
I
I
External capacitance connect pin between C32M and C32P (1u/10V)
I
O 3rd booster output pin. (1u/16V)
O 2nd booster output pin. (1u/16V)
I
External capacitance connect pin between C21M and C21P. (1u/10V)
I
I
A reference level for the grayscale voltage generation circuit.
(connect to gnd)
I I/O power supply
I
Select the CPU interface mode.
(0=parallel interface 1=serial interface)
I
Select the CPU type
(0=intel 80x-system 1=motorola 68x-system)
I/O
BI-directional data bus.
When CPU I/F,
I/O
18-bit interface : DB 17-0
16-bit interface : DB 17-10 , DB 8-1
I/O
9-bit interface : DB 8-0
8-bit interface : DB 8-1
I/O
I/O
When RGB I/F
18-bit interface : DB 17-0
I/O
18-bit interface : DB 17-0
16-bit interface : DB 17-10, DB 8-1
I/O
6-bit interface : DB 8-3
I/O Fix unused pin to the VSS level
I/O
I/O
I/O
17
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