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HCPL-2503-000E Datasheet, PDF (9/12 Pages) AVAGO TECHNOLOGIES LIMITED – Single Channel, High Speed Logic Interface Optocoupler
Electrical Specifications
Over recommended temperature (TA = 0˚C to +70˚C) unless otherwise specified.
Parameter
Symbol Min. Typ.* Max. Units Test Conditions
Logic High
IOH
Output Current
0.5
nA
TA = 25°C, IF = 0 mA
VO = VCC = 5.5 V
50
µA
IF = 0 mA
VO = VCC = 5.5 V
Logic High
ICCH
Supply Current
0.05 4
µA
IF = 0 mA
VO = Open, VCC = 5.5 V
Input Reverse
VR
5
Breakdown Voltage
V
IF = 10 µA, TA = 25°C
Input Capacitance
CIN
60
pF
f = 1 MHz, VF = 0 V
Input-Output
II–O
Insulation Leakage
Current
Resistance
RI–O
(Input–Output)
1.0
µA
45% Relative Humidity,
t = 5s, VI–O = 3000 Vdc,
TA = 25°C
1012
Ω
VI–O = 500 Vdc
Capacitance
CI–O
(Input–Output)
*All typicals at 25˚C.
0.6
pF
f = 1 MHz
Fig. Note
5
6
6
6
Notes:
5. Current Transfer Ratio is defined as the ratio of output collector current, I/O, to the forward LED input current, IF, times 100%.
6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
7. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common mode
pulse VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in Logic Low level is
the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain
in a Logic Low state (i.e., VO < 0.8 V).
8. The 7.5 k load represents 1 LSTTL until load of 0.36 mA and a 20 kΩ pull-up resistor.
9. The 4.7 k load represents 1 LSTTL unit load of 0.36 mA and an 8.2 kΩ pull-up resistor.