HCPL-0738-500E Datasheet, PDF (8/8 Pages) AVAGO TECHNOLOGIES LIMITED – High Speed CMOS Optocoupler

Propagation delay skew is defined as the difference be-
tween the minimum and maximum propagation delays,
either t_PLH or t_PHL, for any given group of optocouplers
which are operating under the same conditions (i.e.,
the same supply voltage, output load, and operating
temperature). As illustrated in Figure 8, if the inputs
of a group of optocouplers are switched either ON or
OFF at the same time, t_PSK is the difference between
the shortest propagation delay, either t_PLH or t_PHL,
and the longest propagation delay, either t_PLH or t_PHL.
As mentioned earlier, t_PSK can determine the maximum
parallel data transmission rate. Figure 8 is the timing dia-
gram of a typical parallel data application with both the
clock and the data lines being sent through optocouplers.
The figure shows data and clock signals at the inputs and
outputs of the optocouplers. To obtain the maximum
data transmission rate, both edges of the clock signal
are being used to clock the data; if only one edge were
used, the clock signal would need to be twice as fast.
Propagation delay skew repre-sents the uncertainty
of where an edge might be after being sent through
an optocoupler. Figure 7 shows that there will be
uncertainty in both the data and the clock lines. It is im-
portant that these two areas of uncertainty not overlap,
otherwise the clock signal might arrive before all of the
data outputs have settled, or some of the data outputs
may start to change before the clock signal has arrived.
From these considerations, the absolute minimum pulse
width that can be sent through optocouplers in a parallel
application is twice t_PSK. A cautious design should use a
slightly longer pulse width to ensure that any additional un-
certainty in the rest of the circuit does not cause a problem.
The t_PSK specified optocouplers offer the advantages of
guaranteed specifications for propagation delays, pulse-
width distortion and propagation delay skew over the
recommended temperature, and power supply ranges.
I_F
50%
V_O
2.5 V,
CMOS
t_PSK
I_F
50%
V_O
2.5 V,
CMOS
Figure 7. Propagation delay skew waveform.
DATA
INPUTS
CLOCK
DATA
OUTPUTS
CLOCK
t_PSK
t_PSK
Figure 8. Parallel data transmission example.
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved.
AV02-0878EN January 8, 2008
8