HCPL-643X Datasheet, PDF (7/12 Pages) AVAGO TECHNOLOGIES LIMITED – Hermetically Sealed, Very High Speed, Logic Gate Optocouplers High radiation immunity

Typical Characteristics
All typical values are at T_A = 25°C, V_CC = 5 V, I_F = 8 mA, unless otherwise specified.
Parameter
Symbol Typ.
Units Test Conditions
Fig.
Input Current Hysteresis
I_HYS
Input Diode Temperature Coefficient
V_F
T_A
Resistance (Input-Output)
R_I-O
Capacitance (Input-Output)
C_I-O
Logic Low Short Circuit Output Current I_OSL
Logic High Short Circuit Output Current I_OSH
Output Rise Time (10-90%)
t_r
Output Fall Time (90-10%)
t_f
Propagation Delay Skew
t_PSK
Power Supply Noise Immunity
PSNI
0.25
-1.11
10¹²
0.6
65
-50
15
10
30
0.5
mA
V_CC = 5 V
3
mV/°C I_F = 10 mA
4

V_I-O = 500 V
pF
f = 1 MHz, V_I-O = 0 V
mA
V_O = V_CC = 5.25 V, I_F = 10 mA
mA
V_CC = 5.25 V, I_F = 0 mA,
V_O = GND
ns
5
ns
5
ns
10
V_P-P
48 Hz ≤ f_ac ≤ 50 MHz
Notes
2
2
6, 9
6, 9
12
7
Single Channel Product Only
Parameter
Input Capacitance
Output Enable Time to Logic High
Output Enable Time to Logic Low
Output Disable Time from Logic High
Output Disable Time from Logic Low
Symbol Typ.
C_IN
15
t_PZH
15
t_PZL
30
t_PHZ
20
t_PLZ
15
Units Test Conditions
pF
f = 1 MHz, V_F = 0 V,
Pins 2 and 3
ns
ns
ns
ns
Fig. Notes
8, 9
8, 9
8, 9
8, 9
Dual and Quad Channel Product Only
Input Capacitance
C_IN
15
Input-Input Leakage Current
I_I-I
0.5
Input-Input Resistance
R_I-I
10¹²
Input-Input Capacitance
C_I-I
1.3
Notes:
1. Not to exceed 5% duty factor, not to exceed 50 sec pulse width.
2. All devices are considered two-terminal devices: measured between
all input leads or terminals shorted together and all output leads or
terminals shorted together.
3. This is a momentary withstand test, not an operating condition.
4. t_PHL propagation delay is measured from the 50% point on the rising
edge of the input current pulse to the 1.5 V point on the falling edge
of the output pulse. The t_PLH propagation delay is measured from the
50% point on the falling edge of the input current pulse to the 1.5 V
point on the rising edge of the output pulse. Pulse Width Distortion,
PWD = |t_PHL - t_PLH|.
5. CM_L is the maximum slew rate of the common mode voltage that can
be sustained with the output voltage in the logic low state (V_O(MAX)
< 0.8 V). CM_H is the maximum slew rate of the common mode voltage
that can be sustained with the output voltage in the logic high state
(V_O(MIN) > 2.0 V).
6. Duration of output short circuit time not to exceed 10 ms.
7. Power Supply Noise Immunity is the peak to peak amplitude of the
ac ripple voltage on the V_CC line that the device will withstand and
still remain in the desired logic state. For desired logic high state,
V_OH(MIN) > 2.0 V, and for desired logic low state, V_OL(MAX) < 0.8 V.
pF
f = 1 MHz, V_O = 0 V
nA
RH ≤ 65%, V_I-I = 500 Vdc
8

V_I-I = 500 V
8
pF
f = 1 MHz, V_F = 0 V
8
8. Measured between adjacent input pairs shorted together for each
multichannel device.
9. Each channel.
10. Standard parts receive 100% testing at 25° C (Subgroups 1 and 9).
SMD, Class H and Class K parts receive 100% testing at 25° C, 125° C,
and -55° C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).
11. Parameters are tested as part of device initial characterization and
after design and process changes. Parameters are guaranteed to
limits specified for all lots not specifically tested.
12. Propagation delay skew is defined as the difference between the
minimum and maximum propagation delays for any given group of
optocouplers with the same part number that are all switching at the
same time under the same operating conditions.
13. The HCPL-6430, HCPL-6431, and HCPL-643K dual channel parts
function as two independent single channel units. Use the single
channel parameter limits.
7