HCMS-3901 Datasheet, PDF (6/18 Pages) AVAGO TECHNOLOGIES LIMITED – 3.3 V High Performance CMOS 5x7 AlphaNumeric Displays

Electrical Description
Pin Function
RESET (RST)
Description
Sets Control Register bits to logic low. The Dot Register contents are unaffected by the
Reset pin. (logic low = reset; logic high = normal operation).
DATA IN (D_IN)
Serial Data input for Dot or Control Register data. Data is entered on the rising edge of the
Clock input.
DATA OUT (D_OUT)
Serial Data output for Dot or Control Register data. This pin is used for cascading
multiple displays.
CLOCK (CLK)
Clock input for writing Dot or Control Register data. When Chip Enable is logic low, data
is entered on the rising Clock edge.
REGISTER SELECT (RS)
Selects Dot Register (RS = logic low) or Control Register (RS = logic high) as the
destination for serial data entry. The logic level of RS is latched on the falling edge of
the Chip Enable input.
CHIP ENABLE (CE)
This input must be a logic low to write data to the display. When CE returns to logic
high and CLK is logic low, data is latched to either the LED output drivers or a Control
Register.
OSCILLATOR SELECT
Selects either an internal or external display oscillator source. (SEL) (logic low = External
Display Oscillator; logic high = Internal Display Oscillator).
OSCILLATOR (OSC)
Output for the Internal Display Oscillator (SEL = logic high) or input for an External
Display Oscillator (SEL = logic low).
BLANK (BL)
Blanks the display when logic high. May be modulated for brightness control.
GND_LED
GND_LOGIC
V_LED
V_LOGIC
Ground for LED drivers.
Ground for logic.
Positive supply for LED drivers.
Positive supply for logic.
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