HCMS-3901 Datasheet, PDF (12/18 Pages) AVAGO TECHNOLOGIES LIMITED – 3.3 V High Performance CMOS 5x7 AlphaNumeric Displays

Control Register
The Control Register allows software modification of
the IC’s operation and consists of two independent
7-bit control words. Bit D₇ in the shift register selects
one of the two 7-bit control words. Control Word 0
performs pulse width modulation brightness control,
peak pixel current brightness control, and sleep mode.
Control Word 1 sets serial/simultaneous data out
mode, and external oscillator prescaler. Each function is
independent of the others.
Control Register Data Loading
Data is loaded into the Control Register, MSB first,
according to the procedure shown in Table 1 and Figure
5. First, RS is brought to logic high and then CE is brought
to logic low. Next, each successive rising CLK edge will
shift in the data on the D_IN pin. Finally, when 8 bits
have been loaded, the CE line is brought to logic high.
When CLK goes to logic low, new data is copied into the
selected control word. Loading data into the Control
Register takes place while the previous control word
configures the display.
Control Word 0
Loading the Control Register with D₇ = Logic low selects
Control Word 0 (see Table 2). Bits D₀ -D₃ adjust the
display brightness by pulse width modulating the LED
on time, while Bits D₄ -D₅ adjusts the display brightness
by changing the peak pixel current. Bit D₆ selects normal
operation or sleep mode.
Sleep mode (Control Word 0, bit D₆ = Low) turns off the
Internal Display Oscillator and the LED pixel drivers. This
mode is used when the IC needs to be powered up, but
does not need to be active. Current draw in sleep mode
is nearly zero. Data in the Dot Register and Control Words
are retained during sleep mode.
Control Word 1
Loading the Control Register with D₇ = logic high
selects Control Word 1. This Control Word performs
two functions: serial/simultaneous data out mode and
external oscillator prescale select (see Table 2).
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