5962-9800101KEC Datasheet, PDF (6/12 Pages) AVAGO TECHNOLOGIES LIMITED – Hermetically Sealed, High Speed, High CMR, Logic Gate Optocouplers

Absolute Maximum Ratings
No derating required up to +125°C.
Parameter
Storage Temperature
Operating Temperature
Case Temperature
Junction Temperature
Lead Solder Temperature
Peak Forward Input Current
(each channel, ≤1 ms duration)
Average Input Forward Current (each channel)
Input Power Dissipation (each channel)
Reverse Input Voltage (each channel
Supply Voltage (1 minute maximum)
Output Current (each channel)
Output Voltage (each channel)
Output Power Dissipation (each channel)
Package Power Dissipation (each channel)
*Selection for higher output voltages up to 20 V is available
Single Channel Product Only
Enable Input Voltage
8 Pin Ceramic DIP Single Channel Schematic
Symbol
T
S
T
A
T
C
T
J
I
F(PEAK)
I
F(AVG)
V
R
V
CC
I
O
V_O
P
O
P
D
Min.
-65
-55
Max.
+150
+125
+170
+175
260 for 10 sec
40
20
35
5
7.0
25
7*
40
200
Units
°C
°C
°C
°C
°C
mA
mA
mW
V
V
mA
V
mW
mW
V_E
5.5
V
Note enable pin 7. An external 0.01 μF to 0.1 μF bypass capacitor must
be connected between V_CC and ground for each package type.
ESD Classification
(MIL-STD-883, Method 3015)
HCPL-5600/01/0K
6N134, 6N134/883B, HCPL-5630/31/3K, HCPL-5650/51, HCPL-6630/31/3K and HCPL-6650/51/5K
(), Class 1
(Dot), Class 3
Recommended Operating Conditions
Parameter
Input Current, Low Level, Each Channel
Input Current, High Level, Each Channel*
Supply Voltage, Output
Fan Out (TTL Load) Each Channel
*Meets or exceeds DLA SMD and JEDEC requirements.
6
Symbol
Min.
Max.
I
0
250
FL
I
10
20
FH
V
4.5
5.5
CC
N
6
Units
μA
mA
V