HCPL-J312 Datasheet, PDF (20/24 Pages) AVAGO TECHNOLOGIES LIMITED – 2.5 Amp Output Current IGBT Gate Drive Optocoupler

Thermal Model (Discussion applies to HCPL-3120, HCPL-
J312 and HCNW3120)
The steady state thermal model for the HCPL-3120 is
shown in Figure 28. The thermal resistance values given
in this model can be used to calculate the tempera­tures
at each node for a given operating condition. As shown
by the model, all heat generated flows through q_CA which
raises the case temperature T_C accordingly. The value
of q_CA depends on the conditions of the board design
and is, therefore, determined by the designer. The value
of q_CA = 83°C/W was obtained from thermal measure­
ments using a 2.5 x 2.5 inch PC board, with small traces
(no ground plane), a single HCPL-3120 soldered into the
center of the board and still air. The absolute maximum
power dissipation derating specifica­tions assume a
q_CAvalue of 83°C/W.
From the thermal mode in Figure 28 the LED and detector
IC junction temperatures can be expressed as:
T_JE = P_E ^@(q_LC||(q_LD + q_DC) + q_CA)
    q_LC * q_DC
+  P _{D  }•(—_qL—_{C +—q}—_DC—+—_qL—_D + q_CA) + T_A
 T _J D =  P  _{E  ( —q—L}q_{CL—+Cq—}•_Dq_{C—D+C—qL—D + qCA)}
+ P_D • (q_DC||(q_LD + q_LC) + q_CA) + T_A
Inserting the values for q_LC and q_DC shown in Figure 28
gives:
T_JE = P_E • (256°C/W + q_CA) 
 + P_D • (57°C/W + q_CA) + T_A 
T_JD = P_E • (57°C/W + q_CA) 
 + P_D • (111°C/W + q_CA) + T_A
P_E Parameter    Description
I_F
LED Current
V_F
LED On Voltage
Duty Cycle
Maximum LED Duty Cycle
P_O Parameter
I_CC
V_CC
V_EE
E_SW(Rg,Qg)
f
Description
Supply Current
Positive Supply Voltage
Negative Supply Voltage
Energy Dissipated in the HCPL-3120 
for each IGBT Switching Cycle
(See Figure 27)
Switching Frequency
14
Qg = 100 nC
12
Qg = 500 nC
Qg = 1000 nC
10
V_CC = 19 V
8
V_EE = -9 V
6
4
2
0
0
10
20
30 40 50
Rg – GATE RESISTANCE – Ω
Figure 27. Energy dissipated in the HCPL-3120 for each IGBT switching
cycle.
HCPL-3120 fig 27
For example, given P_E = 45 mW, P_O = 250 mW, T_A = 70°C
and q_CA = 83°C/W:
T_JE = P_E • 339°C/W + P_D • 140°C/W + T_A 
   = 45 mW • 339°C/W + 250 mW 
     _{• 140°C/W + 70°C = 120°C}
T_JD = P_E • 140°C/W + P_D • 194°C/W + T_A 
 = 45 mW • 140°C/W + 250 mW • 194°C/W + 70°C = 125°C
T_JE and T_JD should be limited to 125°C based on the
board layout and part placement (q_CA) specific to the ap-
plication.
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