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HCPL-J312 Datasheet, PDF (19/24 Pages) AVAGO TECHNOLOGIES LIMITED – 2.5 Amp Output Current IGBT Gate Drive Optocoupler
Selecting the Gate Resistor (Rg) to Minimize IGBT
Switching Losses. (Discussion applies to HCPL-3120,
HCPL-J312 and HCNW3120)
Step 1: Calculate Rg Minimum from the IOL Peak Specifica­
tion. The IGBT and Rg in Figure 26 can be analyzed as a
simple RC circuit with a voltage supplied by the HCPL-
3120.
R g ≥ (— VC—C — I–OVL—PEEEA—-KV —OL—) 
           === (—(—7 1V .2 5C——C ΩVI— —–2O+@.LV5——P58EEAEVAΩ—— -K-  2——2VV——))    
The VOL value of 2 V in the pre­vious equation is a con-
servative value of VOL at the peak current of 2.5A (see
Figure 6). At lower Rg values the voltage supplied by
the HCPL-3120 is not an ideal voltage step. This results
in lower peak currents (more margin) than predicted by
this analysis. When negative gate drive is not used VEE in
the previous equation is equal to zero volts.
Step 2: Check the HCPL-3120 Power Dissipation and
Increase Rg if Necessary. The HCPL-3120 total power
dissipa­tion (PT) is equal to the sum of the emitter power
(PE) and the output power (PO):
PT = PE + PO
PE = IF • VF · Duty Cycle
PO = PO(BIAS) + PO (SWITCHING)
  = ICC • (VCC - VEE)+ ESW(RG, QG) • f
For the circuit in Figure 26 with IF (worst case) =
16 mA, Rg = 8 Ω, Max Duty Cycle = 80%, Qg = 500 nC, 
f = 20 kHz and TA max = 85 °C:
PE = 16 mA • 1.8 V • 0.8 = 23 mW
PO = 4.25 mA • 20 V + 5.2 µ J • 20 kHz
  = 85 mW + 104 mW
  = 189 mW > 178 mW (PO(MAX) @ 85°C
  = 250 mW-15C*4.8 mW/C)
The value of 4.25 mA for ICC in the previous equation was
obtained by derating the ICC max of 5 mA (which occurs
at -40°C) to ICC max at 85C (see Figure 7).
Since PO for this case is greater than PO(MAX), Rg must be
increased to reduce the HCPL-3120 power dissipation.
PO(SWITCHING MAX)   
= PO(MAX) - PO(BIAS)
  = 178 mW - 85 mW
= 93 mW
  E    S W ( M A X)    ==  ­­ ——9P  3O——(mS—  W—WIT— —Cf H=—IN4G—.M65A—Xµ)  W 
  20 kHz
For Qg = 500 nC, from Figure 27, a value of ESW = 4.65 µW
gives a Rg = 10.3 Ω.
+5 V
1
270 Ω
2
CONTROL
INPUT
3
74XXX
OPEN
4
COLLECTOR
HCPL-3120
8
0.1 µF
7
6
5
+ VCC = 15 V
–
Rg
Q1
+ VEE = -5 V
–
Q2
+ HVDC
3-PHASE
AC
- HVDC
Figure 26. HCPL-3120 typical application circuit with negative IGBT gate drive.
HCPL-3120 fig 26
19