HCPL-4504-500E Datasheet, PDF (18/19 Pages) AVAGO TECHNOLOGIES LIMITED – High CMR, High Speed Optocouplers

Figure 17. LED delay and dead time diagram.
Power Inverter Dead Time and Propagation Delay Specifica-
tions
The HCPL-4504/0454/J454 and HCNW4504 include a
specification intended to help designers minimize “dead
time” in their power inverter designs. The new “propaga-
tion delay difference” specification (t_PLH- t_PHL) is useful for
determining not only how much optocoupler switch-
ing delay is needed to prevent “shoot-through” current,
but also for determining the best achievable worst-case
dead time for a given design.
When inverter power transistors switch (Q1 and Q2 in
Figure 17), it is essential that they never conduct at the
same time. Extremely large currents will flow if there is
any overlap in their conduction during switching tran-
sitions, potentially damaging the transistors and even
the surrounding circuitry. This “shoot-through” current is
eliminated by delaying the turn-on of one transistor (Q2)
long enough to ensure that the opposing transistor (Q1)
has completely turned off. This delay introduces a small
amount of “dead time” at the output of the inverter dur-
ing which both transistors are off during switching tran-
sitions. Minimizing this dead time is an important design
goal for an inverter designer.
The amount of turn-on delay needed depends on the
propagation delay characteristics of the optocoupler, as
well as the characteristics of the transistor base/gate drive
circuit. Considering only the delay characteristics of the
optocoupler (the characteristics of the base/gate drive
circuit can be analyzed in the same way), it is important
to know the minimum and maximum turn-on (t_PHL) and
turnoff (t_PLH) propagation delay specifications, prefer-
ably over the desired operating temperature range. The
importance of these specifications is illustrated in Figure
17. The waveforms labeled “LED1”, “LED2”, “OUT1”, and
“OUT2” are the input and output voltages of the opto-
coupler circuits driving Q1 and Q2 respectively. Most in-
verters are designed such that the power transistor turns
on when the optocoupler LED turns on; this ensures that
both power transistors will be off in the event of a power
loss in the control circuit. Inverters can also be designed
such that the power transistor turns off when the opto-
coupler LED turns on; this type of design, however, re-
quires additional fail-safe circuitry to turn off the power
transistor if an over-current condition is detected. The
timing illustrated in Figure 17 assumes that the power
transistor turns on when the optocoupler LED turns on.
18