IAM-91563 Datasheet, PDF (11/14 Pages) Agilent(Hewlett-Packard) – 0.8-6 GHz 3V Downconverter

Adding a shunt capacitance (C2) of 11.3 pF brings the im-
pedance to Point B. The match to Point C at the center of
the chart is completed with a series inductance (L2) of 150
nH.
Although not necessary for many applications, the match
at the LO port can be improved by the addition of series
inductor L3 with a value of approximately 8 nH. Design in-
formation (Γ_LO) for matching the LO port is obtained from
the table of Reflection Coefficients. Capacitor C7 is a DC
block for the LO port.
DC bias is applied to the IAM‑91563 through the RFC at
the IF Output pin. The power supply is bypassed to ground
with capacitor C5 to keep RF, IF, and LO signals off of the
DC bias lines and to prevent gain dips or peaks in the re-
sponse of the mixer. C4 is a DC blocking capacitor for the
output.
The values of the RF bypass capacitors and DC blocking
capacitors that are not part of a impedance matching
structure (i.e., C3 - C7) should be chosen to provide a small
reactance (typically < 5 ohms) at the lowest frequency at
the port for which they are used. The reactance of the RF
choke (RFC) should be high (e.g., several hundred ohms)
at the lowest IF.
The completed 1.9 GHz mixer from the design example
above with all components and SMA connectors in place
is shown in Figure 32. Again, L1 is not used and is replaced
by a metal tab. The length of the shunt transmission line,
MLIN, is adjustable by moving the position of the short-
ing tab between the line and the ground pad. Provision is
made for an additional bypass capacitor, C6, to be added
to the bias line near the V_d connection to eliminate un-
wanted RF feedback through bias lines.
When multiple bypass capacitors are used, consideration
should be given to potential resonances. It is important
to ensure that the capacitors, when combined with addi-
tional parasitic L’s and C’s on the circuit board, do not form
resonant circuits. The addition of a small value resistor in
the bias supply line between bypass capacitors will often
“de-Q” the bias circuit and eliminate resonance effects.
Table 1 summarizes the component values for the 1.9 GHz
design.
Table 1. Component Values for 1.9 GHz Downconverter.
Component
C1
C2
C3, C5, C7
C4
L1
L2
L3
MLIN
RFC
Value
0.5 pF
9 pF
100 pF
500 pF
(not used)
100 nH
8.2 nH
Zo=90 Ω
l = 0.41 in.
320 nH
The values shown in Table 1 may vary from those used
above to describe the basic impedance matching ap-
proach. The final component values take into consider-
ation additional effects such as, the various line lengths
between components, parasitics in components (e.g., the
series inductance in C1), as well as other circuit parasitics.
A CAD program such as Avago Touchstone^® may be used
to fully analyze and account for these circuit ­variables.
LO
C7
RF
L3
C1
L1
C2
L2 C4
RFC
C5
C3
IF
MUN 1
+V
C6
IAM-91
Figure 32. Complete 1.9 GHz Mixer.
The following performance was measured for a 1.9 GHz
circuit:
Measured results:
Conversion Gain = 9.0 dB
LO-RF Isolation = 17 dB
SSB Noise Figure = 8.5 dB
LO-IF Isolation = 34 dB
P_1dB (output) = -8.1 dB
IP₃ (Input) = -7 dBm
Operating conditions:
RF-IF Isolation = 23 dB
RF Frequency = 1.89 GHz
LO Drive Level = -5 dBm
LO Frequency = 1.78 GHz
DC Power = 3.0V @ 9 mA
IF Frequency = 110 MHz
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