IAM-91563 Datasheet, PDF (10/14 Pages) Agilent(Hewlett-Packard) – 0.8-6 GHz 3V Downconverter

Application Example
The printed circuit layout in Figure 28 is a general purpose
layout that will accommodate components for using the
IAM‑91563 for RF inputs from 800 MHz to 6 GHz. This lay-
out is a microstripline design (solid groundplane on the
backside of the circuit board) with 50 Ω interfaces for the
RF input, IF output, and LO input. The circuit is fabricated
on 0.031-inch thick FR-4 dielectric material. Plated through
holes (vias) are used to bring the ground to the top side of
the circuit where needed. Multiple vias are used to reduce
the inductance of the paths to ground.
LO
RF
IF
+V
IAM-91
Figure 28. PCB Layout.
1.9 GHz Design Example
To illustrate a design approach for using the IAM-91563, a
PCS band downconverter with an RF of 1.9 GHz and IF of
110 MHz is presented. The PCB layout above was used to
assemble the mixer and verify performance.
A schematic diagram of the 1.9 GHz circuit is shown in Fig-
ure 29.
RF
Input C1
L1 = 0
MLIN _C3
LO
Input
C7 _C5
V_d
L3
C6
RFC
IF
L2
Output
C2
C4
ries C - shunt L network (from the 50 Ω source to Γ_RF) will
be used to match Γ_RF to 50 Ω. Addition of a 6.5 nH shunt
inductance moves the impedance trajectory from Point A
to Point B. The match to 50 Ω is completed with a 0.6 pF
series capacitance, C1, that moves the match to Point C,
the center of the Smith chart.
1
0.5
2
B
0.2
0.2 0.5
CB
1
C
A
-0.2
RF C1
Input
L
2
A
-0.5
-2
-1
Figure 30. RF Input ­Impedance Match.
For this example, the shunt inductor was realized with the
transmission line, MLIN in Figure 29 (Z_O = 90Ω, length =
0.35 in.). A high quality capacitor should be selected for
C1 to minimize the effects of the capacitor’s parasitic in-
ductance and resistance. Series capacitor C1 also serves
to block any DC that may be present at the output of the
stage preceding the mixer.
At the IF output, the low pass filter and impedance match is
formed by shunt capacitor C2 and series inductor L2. Refer-
ring again to the table of Reflection Coefficients, the IF out-
put port Γ_IF = 0.64 ∠ -8° at 100 MHz, which is the frequency
point closest to the desired IF of 110 MHz. Γ_IF is plotted as
Point A in Figure 31.
1
0.5
2
AB C
Figure 29. Schematic of Example Application Circuit.
At the RF input port, series capacitor C1 and transmission
line MLIN form the input matching network and high pass
filter. (Note: The PCB layout above has provision for an in-
ductor, L1, in series with MLIN. Inductor L1 is not used in
this design.)
Referring to the table of Reflection Coefficients, the RF
input port Γ_RF = 0.82 ∠−37° at 1.9 GHz. This point is plot-
ted as Point A on the Smith chart in Figure 30. For reasons
previously discussed in the “RF Port” section above, a se-
0.2
C2
L2 IF
Output
0.2 0.5
1
C
-0.2
2
A
B
-0.5
-2
-1
Figure 31. IF Input Impedance Match.
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