HCPL-260L Datasheet, PDF (1/19 Pages) AVAGO TECHNOLOGIES LIMITED – High Speed LVTTL Compatible 3.3 Volt Optocouplers Low power consumption

HCPL-260L/060L/263L/063L
High Speed LVTTL Compatible 3.3 Volt Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
The HCPL-260L/060L/263L/063L are optically coupled
gates that combine a GaAsP light emitting diode and
an integrated high gain photo detector. An enable in-
put allows the detector to be strobed. The output of
the detector IC is an open collector Schottky-clamped
transistor. The internal shield provides a guaranteed
common mode transient immunity specification of
15 kV/µs at 3.3V.
This unique design provides maximum AC and DC circuit
isolation while achieving LVTTL/LVCMOS compati-bili-
ty. The optocoupler AC and DC operational parameters
are guaranteed from –40°C to +85°C allowing trouble-
free system performance.
• 3.3V/5V Dual Supply Voltages
• Low power consumption
• 15 kV/µs minimum Common Mode Rejection (CMR) at
V_CM = 1000 V
• High speed: 15 MBd typical
• LVTTL/LVCMOS compatible
• Low input current capability: 5 mA
• Guaranteed AC and DC performance over tempera-
ture: –40°C to +85°C
• Available in 8-pin DIP, SOIC-8
• Strobable output (single channel products only)
These optocouplers are suitable for high speed logic
interfacing, input/output buffering, as line receivers in
environments that conventional line receivers cannot
tolerate and are recommended for use in extremely high
ground or induced noise environments.
• Safety approvals: UL, CSA, IEC/EN/DIN EN 60747-5-5
Applications
• Isolated line receiver
Functional Diagram
HCPL-260L/060L
NC 1
8 VCC
ANODE 2
7 V_E
CATHODE 3
6 VO
NC 4 _SHIELD
5 GND
• Computer-peripheral interfaces
• Microprocessor system interfaces
HCPL-263L/063L
• Digital isolation for A/D, D/A conversion
ANODE ₁ 1
CATHODE ₁ 2
8 VCC
• Switching power supply
7 VO1
• Instrument input/output isolation
CATHODE ₂ 3
6 VO2 _{• Ground loop elimination}
ANODE ₂ 4
SHIELD
5 GND
• Pulse transformer replacement
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
ON
OFF
ON
OFF
ENABLE
H
H
L
L
NC
NC
OUTPUT
L
H
H
H
L
H
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
OUTPUT
L
H
• Field buses
A 0.1 µF bypass capacitor must be
connected between pins 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.