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ATXMEGA256A3BU Datasheet, PDF (89/143 Pages) ATMEL Corporation – 8/16-bit Atmel XMEGA A3BUMicrocontroller
37.17 Two-Wire Interface Characteristics
Table 37-33 describes the requirements for devices connected to the Two-Wire Interface Bus. The Atmel AVR XMEGA
Two-Wire Interface meets or exceeds these requirements under the noted conditions. Timing symbols refer to Figure 37-
7.
Figure 37-7. Two-Wire Interface bus timing.
tof
tHIGH
tLOW
tr
SCL
tSU;STA
SDA
tHD;STA
tHD;DAT
tSU;DAT
tSU;STO
tBUF
Table 37-33. Two-wire interface characteristics.
Symbol
VIH
VIL
Vhys
VOL
tr
tof
tSP
II
CI
fSCL
Parameter
Input high voltage
Input low voltage
Hysteresis of Schmitt Trigger inputs
Output low voltage
Rise time for both SDA and SCL
Output fall time from VIHmin to VILmax
Spikes suppressed by input filter
Input current for each I/O pin
Capacitance for each I/O pin
SCL clock frequency
RP
Value of pull-up resistor
Condition
3mA, sink current
10pF < Cb < 400pF (2)
0.1VCC < VI < 0.9VCC
Min.
0.7VCC
0.5
0.05VCC (1)
0
20+0.1Cb (1)(2)
20+0.1Cb (1)(2)
0
-10
fPER (3)>max(10fSCL, 250kHz)
fSCL  100kHz
fSCL > 100kHz
0
V----C----C----–-----0---.-4----V--
3mA
Typ.
Max.
VCC+0.5
0.3×VCC
Units
V
0.4
300
250
ns
50
10
µA
10
pF
400
kHz
1----0--0----n---s-
Cb

3----0--0----n---s-
Cb
XMEGA A3BU [DATASHEET]
89
8362F–AVR–02/2013