ATR0621 Datasheet, PDF (8/20 Pages) ATMEL Corporation – GPS Baseband Processor

Table 3-1. ATR0621 Pinout (Continued)
Pin Name LFBGA100 Pin Type
Pull Resistor
(Reset Value)⁽¹⁾ Firmware Label
PIO Bank A
PIO Bank B
VBAT18
G6
OUT
VDD18
E6
IN
VDD18
F7
IN
VDD18
F6
IN
VDDIO⁽²⁾
E5
IN
VDD_USB⁽³⁾
F5
IN
XT_IN
J9
IN
XT_OUT
J10
OUT
Notes: 1. PD = internal pull-down resistor, PU = internal pull-up resistor, OH = switched to Output High at reset
2. VDDIO is the supply voltage for the following GPIO pins: P1, P2, P8, P12, P14, P16, P17, P18, P19, P20, P21, P23, P24,
P25, P26, P27 and P29
3. VDD_USB is the supply voltage for the following USB pins: USB_DM and USB_DP. For operation of the USB interface, sup-
ply of 3.0V to 3.6V is required.
3.2 Signal Description
Table 3-2. ATR0621 Signal Description
Module
Name
Function
EM_A0 to EM_A21 External Memory Address Bus
EM_DA0 to EM_DA15 External Memory Data Bus
NCS0 to NCS1 Chip Select
NCS2 to NCS3 Chip Select
NWR0
Lower Byte Write Signal
NWR1
Upper Byte Write Signal
EBI
NRD
Read Signal
NWE
Write Enable
NOE
Output Enable
NUB
Upper Byte Select (16-bit SRAM)
NLB
Lower Byte Select (16-bit SRAM)
BOOT_MODE Boot Mode Input
USART
USB
APMC
RTC
TXD1-2
RXD1-2
SCK1-2
USB_DP
USB_DM
RF_ON
NSLEEP
NSHDN
XT_IN
XT_OUT
Transmit Data Output
Receive Data Input
External Synchronous Serial
Clock
USB Data (D+)
USB Data (D-)
Sleep Output
Shutdown Output
Oscillator Input
Oscillator Output
Type
Output
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Output
Input
I/O
I/O
I/O
Output
Output
Output
Input
Output
Active Level Comment
–
All valid after reset
–
Internal pull-down resistor
Low Output High in RESET state
Low Output High in RESET state
Low Output High in RESET state
Low Output High in RESET state
Low Output High in RESET state
Low Output High in RESET state
Low Output High in RESET state
Low Output High in RESET state
Low Output High in RESET state
–
PIO-controlled after reset,
internal pull-down resistor
–
PIO-controlled after reset
–
PIO-controlled after reset
–
PIO-controlled after reset
–
–
–
Interface to ATR0600
Low Interface to ATR0600
Low Connect to pin LDO_EN
–
RTC oscillator
–
RTC oscillator
8 ATR0621 [Preliminary]
4890AS–GPS–09/05