ATR0621 Datasheet, PDF (6/20 Pages) ATMEL Corporation – GPS Baseband Processor

Table 3-1. ATR0621 Pinout (Continued)
Pin Name LFBGA100 Pin Type
Pull Resistor
(Reset Value)⁽¹⁾ Firmware Label
PIO Bank A
PIO Bank B
EM_A18
B3
OUT
EM_A19
C5
OUT
EM_DA0
B6
I/O
PD
EM_DA1
B10
I/O
PD
EM_DA2
C7
I/O
PD
EM_DA3
C10
I/O
PD
EM_DA4
D10
I/O
PD
EM_DA5
E7
I/O
PD
EM_DA6
E9
I/O
PD
EM_DA7
B7
I/O
PD
EM_DA8
B8
I/O
PD
EM_DA9
A9
I/O
PD
EM_DA10
C8
I/O
PD
EM_DA11
B9
I/O
PD
EM_DA12
D8
I/O
PD
EM_DA13
C9
I/O
PD
EM_DA14
D9
I/O
PD
EM_DA15
E8
I/O
PD
GND
A1
IN
GND
A10
IN
GND
K1
IN
GND
K10
IN
LDOBAT_IN K8
IN
LDO_EN
H7
IN
LDO_IN
K7
IN
LDO_OUT
H6
OUT
NRESET
C4
I/O
Open Drain PU
NSHDN
G7
OUT
NSLEEP
J6
OUT
NTRST
K2
IN
PD
P0
K9
I/O
PD
NANTSHORT
P1
G3
I/O
Configurable (PD) GPSMODE0
AGCOUT1
P2
G4
I/O
Configurable (PD) BOOT_MODE
“0”
CLK32K
P3
H5
I/O
OH
NCS1
NCS1
“0”
P4
A7
I/O
OH
NCS0
NCS0
“0”
P5
B1
I/O
OH
NWE/NWR0
NWE/NWR0
“0”
Notes: 1. PD = internal pull-down resistor, PU = internal pull-up resistor, OH = switched to Output High at reset
2. VDDIO is the supply voltage for the following GPIO pins: P1, P2, P8, P12, P14, P16, P17, P18, P19, P20, P21, P23, P24,
P25, P26, P27 and P29
3. VDD_USB is the supply voltage for the following USB pins: USB_DM and USB_DP. For operation of the USB interface, sup-
ply of 3.0V to 3.6V is required.
6 ATR0621 [Preliminary]
4890AS–GPS–09/05