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AT17C020 Datasheet, PDF (8/12 Pages) ATMEL Corporation – 2-megabit FPGA Configuration EEPROM Memory
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AC Characteristics for AT17C020
VCC = 5V ± 5% Commercial, VCC = 5V ± 10% Industrial/Military
Commercial
Industrial/Military(1)
Symbol Description
Min
Max
Min
Max
TOE(2)
TCE(2)
TCAC(2)
OE to Data Delay
CE to Data Delay
CLK to Data Delay
30.0
35.0
45.0
45.0
50.0
50.0
TOH
TDF(3)
Data Hold From CE, OE or CLK
CE or OE to Data Float Delay
0.0
0.0
50.0
50.0
TLC
CLK Low Time
20.0
20.0
THC
CLK High Time
20.0
20.0
TSCE
CE Setup Time to CLK (to guarantee proper counting)
20.0
25.0
THCE
CE Hold Time from CLK (to guarantee proper counting)
0.0
0.0
THOE
OE High Time (guarantees counter is reset)
20.0
20.0
FMAX
Notes:
MAX Input Clock Frequency
12.5
12.5
1. Preliminary specifications for military operating range only.
2. AC test load = 50 pF.
3. Float delays are measured with 5 pF AC loads. Transition is measured ±200 mV from steady state active levels.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
AC Characteristics for AT17C020 When Cascading
VCC = 5V± 5% Commercial/VCC = 5V ± 10% Industrial/Military
Commercial
Industrial/Military(1)
Symbol Description
Min
Max
Min
Max
TCDF (3)
TOCK(2)
TOCE(2)
TOOE(2)
CLK to Data Float Delay
CLK to CEO Delay
CE to CEO Delay
RESET/OE to CEO Delay
50.0
50.0
35.0
40.0
40.0
80.0
30.0
30.0
FMAX
Notes:
MAX Input Clock Frequency
12.5
12.5
1. Preliminary specifications for military operating range only.
2. AC test load = 50 pF.
3. Float delays are measured with 5 pF AC loads. Transition is measured ±200 mV from steady state active levels.
Units
ns
ns
ns
ns
MHz
8 AT17C/LV020