AT17C020 Datasheet, PDF (1/12 Pages) ATMEL Corporation – 2-megabit FPGA Configuration EEPROM Memory

Features
• EE Reprogrammable 2,097,152 x 1 bit Serial Memories Designed to Store Configuration
Programs for Field Programmable Gate Arrays (FPGAs)
• In-System Programmable via 2-wire Bus
• Simple Interface to SRAM FPGAs
• Compatible with Atmel AT6000, AT40K FPGAs, Altera FLEX^® Devices,
ORCA^® FPGAs, Xilinx XC3000, XC4000, XC5200, Spartan^®, Virtex^® FPGAs
• Cascadable Read Back to Support Additional Configurations or
Future Higher-density Arrays
• Low-power CMOS EEPROM Process
• Programmable Reset Polarity
• Available in PLCC Package (Pin Compatible across Product Family)
• Emulation of Atmel’s AT24CXXX Serial EEPROMs
• Available in 3.3V ± 10% LV and 5V ± 5% C Versions
• System-friendly READY Pin
• Low-power Standby Mode
Description
The AT17C020 and AT17LV020 (high-density AT17 Series) FPGA Configuration
EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration mem-
ory for Field Programmable Gate Arrays. The AT17 Series is packaged in the popular
20-pin PLCC. The AT17 Series family uses a simple serial-access procedure to con-
figure one or more FPGA devices. The AT17 Series organization supplies enough
memory to configure one or multiple smaller FPGAs. The user can select the polarity
of the reset function by programming internal EEPROM bytes. These devices also
support a system-friendly READY pin, which signifies a “good” power level to the
FPGA and can be used to ensure reliable system power-up.
The AT17 Series Configurators can be programmed with industry-standard program-
mers or Atmel’s ATDH2200E Programming System.
2-megabit
FPGA
Configuration
EEPROM
Memory
AT17C020
AT17LV020
Pin Configurations
PLCC
CLK 4
NC 5
RESET/OE 6
NC 7
CE 8
18 NC
17 SER_EN
16 NC
15 READY
14 CEO(A2)
Rev. 1239D–05/01
1