ATAR092 Datasheet, PDF (78/107 Pages) ATMEL Corporation – Low-current Microcontroller for Wireless Communication

Combination Mode 9: Bi-phase Demodulation
SSI mode 1:
8-bit shift register internal data input (SI) and the internal shift clock
(SCI) from the Timer 3
Timer 3 mode 11: Bi-phase demodulation with Timer 3
In the Bi-phase demodulation mode the timer works like in the Manchester demodulation mode.
The difference is that the bits are decoded with the toggle flip-flop. This flip-flop samples the
edge in the middle of the bitframe and the compare register 1 match event shifts the toggle
flip-flop output into shift register. Before activating the demodulation the timer and the demodula-
tion stage must be synchronized with the bitstream. The Bi-phase code timing consists of parts
with the half bitlength and the complete bitlength. The synchronization routine must start the
demodulator after an interval with the complete bitlength.
The counter can be driven by any internal clock source and the output T3O can be used by
Timer 2 in this mode.
Figure 5-57. Bi-phase Demodulation
Timer 3
Mode
Synchronize
Biphase Demodulation Mode
T3I
0
0
1
1
0
1
0
1
0
T3EX
Q1 = SI
CM31 = SCI
Reset
Counter 3
SR-DATA
0
BIT 0
1
BIT 1
1
BIT 2
0
BIT 3
1
BIT 4
0
BIT 5
1
0
BIT 6
78 ATAR092/ATAR892
4535E–4BMCU–05/07