ATAR092 Datasheet, PDF (11/107 Pages) ATMEL Corporation – Low-current Microcontroller for Wireless Communication

ATAR092/ATAR892
Figure 4-7. Reset Configuration
V_DD
Pull-up
NRST
CL
Reset
Internal
Reset ^Timer
Timer
CL = SYSCL/4
Power-on
V_DD
Reset
V_SS
Brown-out
V_DD
Detection
V_SS
Watch-
dog
Reset
CWD
Ext. Clock
Supervisor
Exin
4.3.1
Power-on Reset and Brown-out Detection
The ATAR092/ATAR892 have a fully integrated power-on reset and brown-out detection cir-
cuitry. For reset generation no external components are needed.
These circuits ensure that the core is held in the reset state until the minimum operating supply
voltage has been reached. A reset condition will also be generated should the supply voltage
drop momentarily below the minimum operating level except when a power down mode is acti-
vated (the core is in SLEEP mode and the peripheral clock is stopped). In this power-down
mode the brown-out detection is disabled. Two values for the brown-out voltage threshold are
programmable via the BOT-bit in the SC-register.
A power-on reset pulse is generated by a V_DD rise across the default BOT voltage level (1.7V). A
brown-out reset pulse is generated when V_DD falls below the brown-out voltage threshold. Two
values for the brown-out voltage threshold are programmable via the BOT-bit in the SC-register.
When the controller runs in the upper supply voltage range with a high system clock frequency,
the high threshold must be used. When it runs with a lower system clock frequency, the low
threshold and a wider supply voltage range may be chosen. For further details, see the electrical
specification and the SC-register description for BOT programming.
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4535E–4BMCU–05/07