ATTINY841_14 Datasheet, PDF (73/366 Pages) ATMEL Corporation – 8-bit AVR Microcontroller with 4/8K Bytes In-System

10.4.7 PUEA – Port A Pull-Up Enable Control Register
Bit
(0x63)
Read/Write
Initial Value
7
PUEA7
R/W
0
6
PUEA6
R/W
0
5
PUEA5
R/W
0
4
PUEA4
R/W
0
3
PUEA3
R/W
0
2
PUEA2
R/W
0
1
PUEA1
R/W
0
0
PUEA0
R/W
0
 Bits 7:0 – PUEA[7:0]: Pull-Up Enable Bits
When a pull-up enable bit, PUEAn, is set the pull-up resistor on the equivalent port pin, PAn, is enabled.
10.4.8 PORTA – Port A Data Register
PUEA
Bit
0x1B (0x3B)
Read/Write
Initial Value
7
PORTA7
R/W
0
6
PORTA6
R/W
0
5
PORTA5
R/W
0
4
PORTA4
R/W
0
3
PORTA3
R/W
0
2
PORTA2
R/W
0
1
PORTA1
R/W
0
0
PORTA0
R/W
0
PORTA
 Bits 7:0 – PORTA[3:0]: Port Data Bits
When pin PAn is configured as an output, setting PORTAn will drive PAn high. Clearing PORTAn will drive PAn low.
When the pin is configured as an input the value of the PORTxn bit doesn’t matter. See Table 10-1 on page 57.
10.4.9 DDRA – Port A Data Direction Register
Bit
0x1A (0x3A)
Read/Write
Initial Value
7
DDA7
R/W
0
6
DDA6
R/W
0
5
DDA5
R/W
0
4
DDA4
R/W
0
3
DDA3
R/W
0
2
DDA2
R/W
0
1
DDA1
R/W
0
0
DDA0
R/W
0
DDRA
 Bits 7:0 – DDA[7:0]: Data Direction Bits
When DDAn is set, the pin PAn is configured as an output. When DDAn is cleared, the pin is configured as an input.
10.4.10 PINA – Port A Input Pins
Bit
0x19 (0x39)
Read/Write
Initial Value
7
PINA7
R/W
N/A
6
PINA6
R/W
N/A
5
PINA5
R/W
N/A
4
PINA4
R/W
N/A
3
PINA3
R/W
N/A
2
PINA2
R/W
N/A
1
PINA1
R/W
N/A
0
PINA0
R/W
N/A
PINA
 Bits 7:0 – PINA[7:0]: Port Input Data
Regardless of the setting of the data direction bit, the value of the port pin PAn can be read through the PINAn bit.
Writing a logic one to PINAn toggles the value of PORTAn, regardless of the value in DDAn.
ATtiny441/841 [DATASHEET] 73
8495H–AVR–05/2014