AT24C16C-SSHM-T Datasheet, PDF (7/24 Pages) ATMEL Corporation – Two-wire Serial Electrically Erasable and Programmable Read-only Memory

Atmel AT24C16C
Figure 3-2. Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O^®
t_F
t_HIGH
SCL
t_LOW
t_LOW
t_SU.STA
t_HD.STA
t_HD.DAT
SDA IN
t_AA
SDA OUT
t_SU.DAT
t_DH
t_R
t_SU.STO
t_BUF
Figure 3-3. Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th BIT
ACK
WORDn
STOP
CONDITION
(1)
t_wr
START
CONDITION
Note: The write cycle time t_WR is the time from a valid stop condition of a write sequence to the end of the internal
clear/write cycle
Figure 3-4. Data Validity
SDA
SCL
DATA STABLE
DATA STABLE
DATA
CHANGE
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