ATMEGA3290P_14 Datasheet, PDF (69/427 Pages) ATMEL Corporation – High Endurance Non-volatile Memory segments

ATmega329P/3290P
13.3 Alternate Port Functions
Most port pins have alternate functions in addition to being general digital I/Os. Figure 13-5
shows how the port pin control signals from the simplified Figure 13-2 can be overridden by
alternate functions. The overriding signals may not be present in all port pins, but the figure
serves as a generic description applicable to all port pins in the AVR microcontroller family.
Figure 13-5. Alternate Port Functions⁽¹⁾
PUOExn
PUOVxn
1
0
PUD
DDOExn
DDOVxn
1
0
PVOExn
PVOVxn
QD
DDxn
Q CLR
RESET
WDx
RDx
1
Pxn
0
1
QD
0
PORTxn
PTOExn
DIEOExn
Q CLR
DIEOVxn
1
0
SLEEP
RESET
WRx
RRx
WPx
SYNCHRONIZER
D ^SET Q
L CLR Q
DQ
PINxn
CLR Q
RPx
clk _I/O
DIxn
AIOxn
PUOExn: Pxn PULL-UP OVERRIDE ENABLE
PUOVxn: Pxn PULL-UP OVERRIDE VALUE
DDOExn: Pxn DATA DIRECTION OVERRIDE ENABLE
DDOVxn: Pxn DATA DIRECTION OVERRIDE VALUE
PVOExn: Pxn PORT VALUE OVERRIDE ENABLE
PVOVxn: Pxn PORT VALUE OVERRIDE VALUE
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP: SLEEP CONTROL
PTOExn: Pxn, PORT TOGGLE OVERRIDE ENABLE
PUD:
WDx:
RDx:
RRx:
WRx:
RPx:
WPx:
clk_I/O:
DIxn:
AIOxn:
PULLUP DISABLE
WRITE DDRx
READ DDRx
READ PORTx REGISTER
WRITE PORTx
READ PORTx PIN
WRITE PINx
I/O CLOCK
DIGITAL INPUT PIN n ON PORTx
ANALOG INPUT/OUTPUT PIN n ON PORTx
Note: 1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk_I/O,
SLEEP, and PUD are common to all ports. All other signals are unique for each pin.
Table 13-2 summarizes the function of the overriding signals. The pin and port indexes from Fig-
ure 13-5 are not shown in the succeeding tables. The overriding signals are generated internally
in the modules having the alternate function.
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