AT87C5112_14 Datasheet, PDF (69/97 Pages) ATMEL Corporation – Hardware Watchdog Timer with Reset-out

4191C–8051–02/08
AT8xC5112
Table 7. IPH0 Register
IPH0 - Interrrupt Priority High Register
7
6
5
4
-
PPCH
-
PSH
3
PT1H
2
PX1H
1
PT0H
Bit
Bit
Number Mnemonic Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Counter Interrupt Priority level most significant bit
PPCH PPC Priority Level
6
PPCH ⁰
0
Lowest
0
1
1
0
1
1
Highest
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Serial port Priority High bit
PSH PS Priority Level
0
0
Lowest
4
PSH
0
1
1
0
1
1
Highest
Timer 1 overflow interrupt Priority High bit
PT1H PT1
Priority Level
3
PT1H ⁰
0
Lowest
0
1
1
0
1
1
Highest
External interrupt 1 Priority High bit
PX1H PX1
Priority Level
0
0
Lowest
2
PX1H
0
1
1
0
1
1
Highest
Timer 0 overflow interrupt Priority High bit
PT0H PT0
Priority Level
1
PT0H ⁰
0
Lowest
0
1
1
0
1
1
Highest
External interrupt 0 Priority High bit
PX0H PT0
Priority Level
0
PX0H ⁰
0
Lowest
0
1
1
0
1
1
Highest
Reset value = X0X0 0000b
Not bit addressable
0
PX0H
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