SAM-G53N_14 Datasheet, PDF (685/949 Pages) ATMEL Corporation – Atmel | SMART ARM-based Flash MCU

29.8.9 TWI Interrupt Mask Register
Name:
TWI_IMR
Address: 0x4001C02C (1), 0x4004002C (2)
Access: Read-only
31
30
29
28
27
26
–
–
–
–
–
–
23
22
21
20
19
18
–
–
–
–
–
–
15
TXBUFE
14
RXBUFF
13
ENDTX
12
ENDRX
11
EOSACC
10
SCL_WS
7
6
5
4
3
2
–
OVRE
GACC
SVACC
–
TXRDY
The following configuration values are valid for all listed bit names of this register:
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
• TXCOMP: Transmission Completed Interrupt Mask
• RXRDY: Receive Holding Register Ready Interrupt Mask
• TXRDY: Transmit Holding Register Ready Interrupt Mask
• SVACC: Slave Access Interrupt Mask
• GACC: General Call Access Interrupt Mask
• OVRE: Overrun Error Interrupt Mask
• NACK: Not Acknowledge Interrupt Mask
• ARBLST: Arbitration Lost Interrupt Mask
• SCL_WS: Clock Wait State Interrupt Mask
• EOSACC: End Of Slave Access Interrupt Mask
• ENDRX: End of Receive Buffer Interrupt Mask
• ENDTX: End of Transmit Buffer Interrupt Mask
• RXBUFF: Receive Buffer Full Interrupt Mask
• TXBUFE: Transmit Buffer Empty Interrupt Mask
25
–
17
–
9
ARBLST
1
RXRDY
24
–
16
–
8
NACK
0
TXCOMP
SAM G53G / SAM G53N [DATASHEET]
Atmel-11240E-ATARM-SAM-G53G-SAM-G53N-Datasheet_17-Oct-14
685