ATTINY40 Datasheet, PDF (61/216 Pages) ATMEL Corporation – 8-bit AVR Microcontroller with 4K Bytes In-System Programmable Flash

ATtiny40
Table 10-11 and Table 10-12 relate the alternate functions of Port C to the overriding signals
shown in Figure 10-6 on page 52.
Table 10-11. Overriding Signals for Alternate Functions in PC[5:3]
Signal
Name
PUOE
PC5/CLKI/PCINT17
EXT_CLOCK⁽¹⁾
PC4/MOSI/SDA/PCINT16
0
PUOV
DDOE
0
EXT_CLOCK⁽¹⁾
0
(SPE • MSTR) + TWEN
DDOV
PVOE
0
EXT_CLOCK⁽¹⁾
TWEN • SDA_OUT
TWEN + (SPE • MSTR)
TWEN • SPE • MSTR •
PVOV
0
SPI_MASTER_OUT +
TWEN • (SPE + MSTR)
PTOE
0
0
DIEOE
EXT_CLOCK + (PCINT17 •
PCIE2)
PCINT16 • PCIE2
DIEOV
(EXT_CLOCK • PWR_DOWN )
+ (EXT_CLOCK⁽¹⁾ • PCINT17 •
PCIE2)
PCINT16 • PCIE2
DI
CLOCK / PCINT17 Input
PCINT16 / SPI Slave Input
AIO
SDA Input
PC3/RESET/PCINT15
RSTDISBL⁽²⁾
1
RSTDISBL⁽²⁾
0
RSTDISBL⁽²⁾
0
0
RSTDISBL⁽²⁾ + (PCINT15 •
PCIE2)
RSTDISBL⁽²⁾ • PCINT15 •
PCIE2
PCINT15 Input
Notes:
1. EXT_CLOCK = external clock is selected as system clock.
2. x RSTDISBL is 1 when the configuration bit is “0” (programmed).
3. When TWI is enabled the slew rate control and spike filter are activated on PC4. This is not
illustrated in Figure 10-6 on page 52. The spike filter is connected between AIOxn and the
TWI.
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