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U6083B Datasheet, PDF (6/12 Pages) TEMIC Semiconductors – PWM Power Control with Interference Suppression
Output Slope Control
Interference
Suppression
The slope of the lamp voltage is internally limited to reduce radio interference by limita-
tion of the voltage gain of the PWM comparator.
Thus, the voltage rise on the lamp is proportional to the oscillator voltage increase at the
switchover time according to the equation.
dV8/dt = a4 ´ dV4/dt = 2 ´ a4 ´ f ´ (a2 - a3) ´ (VBatt - IS ´ R3)
when
f = 75 Hz, VTX = VT < 100 and a4 = 63
then
dV8/dt = 2 ´ 63 ´ 75 Hz ´ (0.67 - 0.28) ´ (12 V - 4 mA ´ 15 W) = 42 V/ms
Via an external capacitor, C4, the slope can be further reduced as follows:
dV8/dt = IOSC/(C4 + C2/a4)
when
IOSC = 45 µA, C4 = 1.8 nF, C2 = 68 nF and a4 = 63
then dV8/dt = 45 µA/(1.8 nF + 68 nF/63) = 15.6 V/ms
To damp oscillation tendencies, a resistance of 100 W in series with capacitance C4 is
recommended.
• “On-board” radio reception according to VDE 0879 part 3/4.81
• Test conditions refering to Figure 3
• Application circuit according to Figure 1 on page 2 or Figure 4 on page 10
• Load: nine 4 W lamps in parallel
• Duty cycle = 18%
• VBatt = 12 V
• fOsc = 100 Hz
Figure 3. Voltage Spectrum of On-board Radio Reception
6 U6083B
4770A–AUTO–11/03