U6083B Datasheet, PDF (4/12 Pages) TEMIC Semiconductors – PWM Power Control with Interference Suppression

Functional Description
Pin 1, Supply Voltage, V_S or V_Batt
Overvoltage Detection
Stage 1
Stage 2
Undervoltage Detection
Pin 2, GND
If overvoltages of V_Batt > 20 V (typically) occur, the external transistor is switched off,
and switched on again at V_Batt < 18.5 V (hysteresis).
If V_Batt > 28.5 V (typically), the voltage limitation of the IC is reduced from V_S = 26 V to
20 V. The gate of the external transistor remains at the potential of the IC ground, thus
producing voltage sharing between FET and lamps in the event of overvoltage pulses
(e.g., load dump). The short-circuit protection is not in operation. At
V_Batt approximately < 23 V, the overvoltage detection stage 2 is switched off. Thus, dur-
ing overvoltage detection stage 2, the lamp voltage V_lamp is calculated as follows:
V_Lamp = V_Batt - V_S - V_GS
V_S = supply voltage of the IC at overvoltage detection stage 2
V_GS = gate - source voltage of the FET
In the event of voltages of approximately V_Batt < 5.0 V, the external FET is switched off
and the latch for short-circuit detection is reset.
A hysteresis ensures that the FET is switched on again at approximately V_Batt ³ 5.4 V.
Ground-wire Breakage
To protect the FET in the case of ground-wire breakage, a 1 MW resistor between gate
and source is recommended to provide proper switch-off conditions.
Pin 3, Control Input
Pin 4, Oscillator
The pulse width is controlled by means of an external potentiometer (47 kW). The char-
acteristic (angle of rotation/duty cycle) is linear. The duty cycle can be varied from 18 to
100%. It is possible to further restrict the duty cycle with the resistors R₁ and R₂ (see
Figure 4 on page 10).
In order to reduce the power dissipation of the FET and to increase the lifetime of the
lamps, the IC automatically reduces the maximum duty cycle at pin 8 if the supply volt-
age exceeds V₂ = 13 V. Pin 3 is protected against short-circuit to V_Batt and ground
(V_Batt £ 16.5 V).
The oscillator determines the frequency of the output voltage. This is defined by an
external capacitor, C₂. It is charged with a constant current, I, until the upper switching
threshold is reached. A second current source is then activated which taps a double cur-
rent, 2 ´ I, from the charging current. The capacitor, C₂, is thus discharged at the
current, I, until the lower switching threshold is reached. The second source is then
switched off again and the procedure starts once more.
4 U6083B
4770A–AUTO–11/03