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| U5021M_05 Datasheet, PDF (6/11 Pages) ATMEL Corporation – Digital Window Watchdog Timer | |||
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Figure 4-4. Pulse Diagram of a Correct Trigger Sequence During the Short Watchdog Time
VDD
Reset out
Mode
t0
t1
t2
t3
t2
Trigger
Pin 6
Pin 5
Pin 3
Pin 2
Enable
ttrig
Pin 4
Figure 4-5 shows the switch-over from the short to the long watchdog mode. The wake-up signal
during the enable time, t5, activates a reset pulse, t6.
The watchdog can be switched back from the long to the short watchdog mode with a low poten-
tial at the mode pin (pin 3).
Figure 4-5. Pulse Diagram of the Long Watchdog Time
Reset out
Wake-up
t4
Mode
t2
Trigger
Enable
t6 t1
Pin 5
Pins 1
t5
Pin 3
Pin 2
Pin 4
5. State Diagram
The kernel of the watchdog is a finite state machine. Figure 5-1 shows the state diagram with all
possible states and transmissions. Many transmissions are controlled by an internal timer. The
numbers for the time-outs are the same as on the pulse diagrams.
6 U5021M
4756DâAUTOâ11/05
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