U5021M_05 Datasheet, PDF (4/11 Pages) ATMEL Corporation – Digital Window Watchdog Timer

Figure 4-1. Period t versus R₁, at C₁ = 500 pF
1000.00
100.00
t (µs)
10.00
1.00
1
C₁ = 500 pF
10
100
R₁ (kΩ)
Figure 4-2. Power-on Reset and Switch-over Mode
VDD
t₀
Reset Out
t₁
Mode
4.5 V
5.0 V
5.5 V
1000
Pin 6
t₆
Pin 5
Pin 3
4.3 Supply Voltage Monitoring, Pin 5
During ramp-up of the supply voltage and in the case of supply-voltage drops the integrated
power-on reset (POR) circuitry sets the internal logic to a defined basic status and generates a
reset pulse at the reset output, pin 5. A hysteresis in the POR threshold prevents the circuit from
oscillating. During ramp-up of the supply voltage, the reset output stays active for a specified
period of time (t₀) in order to bring the microcontroller into its defined reset status (see Figure
4-2). Pin 5 has an open-drain output.
4.4 Switch-over Mode Time, Pin 3
The switch-over mode time enables the synchronous operation of microcontroller and watchdog.
When the power-on reset time has elapsed, the watchdog has to be switched to monitoring
mode by the microcontroller by a “low” signal transmitted to the mode pin (pin 3) within the
time-out period, t₁. If the low signal does not occur within t₁ (see Figure 4-2), the watchdog gen-
erates a reset pulse, t₆, and t₁ starts again. Microcontroller and watchdog are synchronized with
the switch-over mode time, t₁, each time a reset pulse is generated.
4 U5021M
4756D–AUTO–11/05