AT90PWM161_14 Datasheet, PDF (6/327 Pages) ATMEL Corporation – 131 powerful instructions - most single clock cycle execution

AT90PWM81/161
Table 2-2. Pin out description.
Port
PB0
PE0
PD0
PB1
PB2
VCC
GND
PE1
PE2
SO 20 QFN32
pins pins GP
1
30 T1
2
31 RESET# OCD, INT2
NA
2 CLKO, SS
3
3
4
4 INT0
5
5 Power Supply
6
6 Ground
7
7 XTAL1
8
10 XTAL2
PD1
9
PD2
10
PD3 NA
PB3
11
PB4
12
PD4 NA
PB5
13
AVCC
14
AGND
15
16
PD5
17
PD6
18
PB6
19
PD7 NA
PB7
20
11
12
13
14
15 MOSI
18
19 INT1, SCK
20 Analog Supply
21 Analog Ground
22 AREF, Analog Ref
23
26
27 MISO
28
29 ICP1
PSC
ADC
PSCOUT23
PSCOUT20
PSCOUT21
Analog
ACMP3_OUT
ACMP3_OUT_A
PSCIN2
PSCINr
PSCOUTR0,
PSCINrB
PSCOUTR1
PSCIN2A
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ACMP1_OUT
ACMP1M
ACMP1
ACMP2_OUT
ACMP2M
ACMPM
ACMP3M
ACMP2
PSCINrA
PSCOUT22
ADC6
ADC7
ADC8
ADC10
ADC9
AMP0-
AMP0+
ACMP3
2.1 Pin Descriptions
2.1.1
V_CC
Digital supply voltage.
2.1.2 GND
Ground.
2.1.3
Port B (PB7..PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the AT90PWM81/161 as listed on
Table 9-3 on page 75.
6
7734Q–AVR–02/12