SAM7S512_14 Datasheet, PDF (501/775 Pages) ATMEL Corporation – ARM-based Flash MCU

35. USB Device Port (UDP)
35.1 Overview
The USB Device Port (UDP) is compliant with the Universal Serial Bus (USB) V2.0 full-speed device specification.
Each endpoint can be configured in one of several USB transfer types. It can be associated with one or two banks
of a dual-port RAM used to store the current data payload. If two banks are used, one DPR bank is read or written
by the processor, while the other is read or written by the USB device peripheral. This feature is mandatory for iso-
chronous endpoints. Thus the device maintains the maximum bandwidth (1M bytes/s) by working with endpoints
with two banks of DPR.
Table 35-1. USB Endpoint Description
Endpoint Number
Mnemonic
Dual-Bank
Max. Endpoint Size
Endpoint Type
0
EP0
No
8
Control/Bulk/Interrupt
1
EP1
Yes
64
Bulk/Iso/Interrupt
2
EP2
Yes
64
Bulk/Iso/Interrupt
3
EP3
No
64
Control/Bulk/Interrupt
Suspend and resume are automatically detected by the USB device, which notifies the processor by raising an
interrupt. Depending on the product, an external signal can be used to send a wake up to the USB host controller.
35.2 Block Diagram
Figure 35-1. Block Diagram
Atmel Bridge
APB
to
MCU
Bus
MCK
U
s
UDPCK
e
r
I
n
t
e
r
f
udp_int
a
c
e
external_resume
USB Device
W
W
r
Dual
r
Serial
a
Port
a
Interface
p
RAM
p
Engine
p
p
e
r
FIFO
e
r ^{12 MHz}
SIE
Master Clock
Domain
Suspend/Resume Logic
Recovered 12 MHz
Domain
txoen
eopn
txd
DP
Embedded
rxdm
USB
Transceiver
DM
rxd
rxdp
Access to the UDP is via the APB bus interface. Read and write to the data FIFO are done by reading and writing
8-bit values to APB registers.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
501