ATTINY25_07 Datasheet, PDF (44/201 Pages) ATMEL Corporation – 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash

The following code example shows one assembly and one C function for turning off the WDT.
The example assumes that interrupts are controlled (e.g., by disabling interrupts globally) so that
no interrupts will occur during execution of these functions.
Assembly Code Example⁽¹⁾
WDT_off:
WDR
; Clear WDRF in MCUSR
ldi r16, (0<<WDRF)
out MCUSR, r16
; Write logical one to WDCE and WDE
; Keep old prescaler setting to prevent unintentional Watchdog
Reset
in r16, WDTCR
ori r16, (1<<WDCE)|(1<<WDE)
out WDTCR, r16
; Turn off WDT
ldi r16, (0<<WDE)
out WDTCR, r16
ret
C Code Example⁽¹⁾
void WDT_off(void)
{
_WDR();
/* Clear WDRF in MCUSR */
MCUSR = 0x00
/* Write logical one to WDCE and WDE */
WDTCR |= (1<<WDCE) | (1<<WDE);
/* Turn off WDT */
WDTCR = 0x00;
}
Note: 1. The example code assumes that the part specific header file is included.
8.3 Timed Sequences for Changing the Configuration of the Watchdog Timer
The sequence for changing configuration differs slightly between the two safety levels. Separate
procedures are described for each level.
8.3.1
Safety Level 1
In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the WDE bit
to one without any restriction. A timed sequence is needed when disabling an enabled Watch-
dog Timer. To disable an enabled Watchdog Timer, the following procedure must be followed:
1. In the same operation, write a logic one to WDCE and WDE. A logic one must be writ-
ten to WDE regardless of the previous value of the WDE bit.
2. Within the next four clock cycles, in the same operation, write the WDE and WDP bits
as desired, but with the WDCE bit cleared.
44 ATtiny25/45/85 Auto
7598D–AVR–02/07