AT75C Datasheet, PDF (43/171 Pages) ATMEL Corporation – Smart Internet Appliance Processor (SIAP)

1368C–INTAP–08/02
AT75C DSP Subsystem
BKREP – Block-Repeat
Syntax:
bkrep operand, address
Operation:
operand −> lc
1 −> LP status bit
BCx + 1 −> BCx
Begin a block-repeat that is to be repeated operand + 1 times.
The repetition range is from 1 to 65536.
The first block address is the address after the bkrep instruction and the
last block address is the address specified in the address field. The
operand is inserted into the loop counter register (lc). The inloop status
bit LP is set – indicating a block-repeat loop. The block-repeat nesting
level counter is incremented by one.
The repeated block is interruptible.
Operand:
#unsigned short immediate
REG
Affected Flags:
Z
M
N
V
C
E
L
R
–
–
–
–
–
–
–
–
Cycles:
Words:
Notes:
2
2
This instruction can be nested. Four levels of block-repeat can be used.
When using an unsigned short immediate operand, the number of repe-
titions is between 1 and 256. When transferring the #unsigned short
immediate number into the lc register, it is copied to the low-order 8 bits
of lc. The high-order 8 bits are zero-extended.
In case the last instruction at the block-repeat is:
a. a one-word instruction, the address field should contain the address
of the instruction;
b. a two-word instruction, the address field should contain the address
of the second word.
In the outer block-repeat level, the REG cannot be aX, bX, p.
In other nested levels, the REG cannot be aX, bX, p, lc. Note that the
assembler cannot check the restriction on lc register in a nested block-
repeat.
The data read while reading lc during a block repeat loop execution is
from the loop counter. If the outer block repeat loop has normally com-
pleted its turn with the contents of lc of 0; if it was completed using
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